| 1998 |
|---|
| 4 | EE | Juan A. Prieto,
Adoración Rueda,
Ian A. Grout,
Eduardo J. Peralías,
José L. Huertas,
Andrew M. D. Richardson:
An Approach to Realistic Fault Prediction and Layout Design for Testability in Analog Circuits.
DATE 1998: 905- |
| 3 | EE | Eduardo J. Peralías,
Adoración Rueda,
Juan A. Prieto,
José L. Huertas:
DfT and on-line test of high-performance data converters: a practical case.
ITC 1998: 534- |
| 1997 |
|---|
| 2 | EE | Juan A. Prieto,
Adoración Rueda,
José M. Quintana,
José Luis Huertas:
A performance-driven placement algorithm with simultaneous Place&Route optimization for analog ICs.
ED&TC 1997: 389-394 |
| 1994 |
|---|
| 1 | | Juan A. Prieto,
José M. Quintana,
Adoración Rueda,
José L. Huertas:
An Algorithm for the Place-and-Route Problem in the Layout of Analog Circuits.
ISCAS 1994: 491-494 |
