| 2008 |
|---|
| 13 | EE | Sagar Chaki,
Edmund M. Clarke,
Natasha Sharygina,
Nishant Sinha:
Verification of evolving software via component substitutability analysis.
Formal Methods in System Design 32(3): 235-266 (2008) |
| 2007 |
|---|
| 12 | EE | Nishant Sinha,
Edmund M. Clarke:
SAT-Based Compositional Verification Using Lazy Learning.
CAV 2007: 39-54 |
| 2006 |
|---|
| 11 | EE | Vineet Kahlon,
Aarti Gupta,
Nishant Sinha:
Symbolic Model Checking of Concurrent Programs Using Partial Orders and On-the-Fly Transactions.
CAV 2006: 286-299 |
| 10 | EE | Sagar Chaki,
Nishant Sinha:
Assume-Guarantee Reasoning for Deadlock.
FMCAD 2006: 134-144 |
| 2005 |
|---|
| 9 | EE | Sagar Chaki,
Edmund M. Clarke,
Nishant Sinha,
Prasanna Thati:
Automated Assume-Guarantee Reasoning for Simulation Conformance.
CAV 2005: 534-547 |
| 8 | EE | Natasha Sharygina,
Sagar Chaki,
Edmund M. Clarke,
Nishant Sinha:
Dynamic Component Substitutability Analysis.
FM 2005: 512-528 |
| 7 | EE | Edmund M. Clarke,
Natasha Sharygina,
Nishant Sinha:
Program Compatibility Approaches.
FMCO 2005: 243-258 |
| 6 | | Edmund M. Clarke,
Himanshu Jain,
Nishant Sinha:
Grand Challenge: Model Check Software.
VISSAS 2005: 55-68 |
| 5 | EE | Sagar Chaki,
Edmund M. Clarke,
Joël Ouaknine,
Natasha Sharygina,
Nishant Sinha:
Concurrent software verification with states, events, and deadlocks.
Formal Asp. Comput. 17(4): 461-483 (2005) |
| 2004 |
|---|
| 4 | EE | Muralidhar Talupur,
Nishant Sinha,
Ofer Strichman,
Amir Pnueli:
Range Allocation for Separation Logic.
CAV 2004: 148-161 |
| 3 | EE | Sagar Chaki,
Edmund M. Clarke,
Joël Ouaknine,
Natasha Sharygina,
Nishant Sinha:
State/Event-Based Software Model Checking.
IFM 2004: 128-147 |
| 2003 |
|---|
| 2 | EE | Flavio Lerda,
Nishant Sinha,
Michael Theobald:
Symbolic Model Checking of Software.
Electr. Notes Theor. Comput. Sci. 89(3): (2003) |
| 2002 |
|---|
| 1 | EE | Debasis Samanta,
Nishant Sinha,
Ajit Pal:
Synthesis of High Performance Low Power Dynamic CMOS Circuits.
VLSI Design 2002: 99-104 |
