| 2004 |
|---|
| 5 | EE | Juan de Vicente,
Juan Lanchares,
Román Hermida:
Annealing placement by thermodynamic combinatorial optimization.
ACM Trans. Design Autom. Electr. Syst. 9(3): 310-332 (2004) |
| 2002 |
|---|
| 4 | EE | Juan de Vicente,
Juan Lanchares,
Román Hermida:
FPGA Placement by Thermodynamic Combinatorial Optimization.
DATE 2002: 54-60 |
| 2000 |
|---|
| 3 | EE | Juan de Vicente,
Juan Lanchares,
Román Hermida:
Adaptive FPGA Placement by Natural Optimization.
IEEE International Workshop on Rapid System Prototyping 2000: 188-193 |
| 1999 |
|---|
| 2 | | Juan de Vicente,
Juan Lanchares,
Román Hermida:
Placement Optimization Based on Global Routing Updating for System Partitioning onto Multi-FPGA Mesh Topologies.
FPL 1999: 91-100 |
| 1998 |
|---|
| 1 | EE | Juan de Vicente,
Juan Lanchares,
Román Hermida:
RSR: A New Rectilinear Steiner Minimum Tree Approximation for FPGA Placement and Global Routing.
EUROMICRO 1998: 10192-10195 |
