G. Ph. Alexiou
List of publications from the
2007 |
13 | EE | V. Mariatos,
K. Adaos,
George Alexiou:
Design and Implementation of a Reconfigurable, Embedded Real-Time Face Detection System.
IEEE International Workshop on Rapid System Prototyping 2007: 65-68 |
12 | EE | Nikos Petrellis,
Nikos Konofaos,
George Alexiou:
A wireless infrared sensor network for the estimation of the position and orientation of a moving target.
MobiMedia 2007: 65 |
2006 |
11 | | Nikos Petrellis,
Nikos Konofaos,
George Alexiou:
Position Estimation on a Grid, Based on Infrared Pattern Reception Features.
IWUC 2006: 21-28 |
10 | EE | Dimitris Bakalis,
K. Adaos,
D. Lymperopoulos,
Maciej Bellos,
Haridimos T. Vergos,
George Alexiou,
Dimitris Nikolos:
A core generator for arithmetic cores and testing structures with a network interface.
Journal of Systems Architecture 52(1): 1-12 (2006) |
2004 |
9 | EE | Nikos Konofaos,
G. Ph. Alexiou:
New Challenges Emerging on the Design of VLSI Circuits Made of MOSFETs Using New Gate Dielectric Materials.
ISQED 2004: 92-97 |
2002 |
8 | EE | Dimitris Bakalis,
Emmanouil Kalligeros,
Dimitris Nikolos,
Haridimos T. Vergos,
George Alexiou:
On the design of low power BIST for multipliers with Booth encoding and Wallace tree summation.
Journal of Systems Architecture 48(4-5): 125-135 (2002) |
2001 |
7 | EE | Dimitris Bakalis,
K. Adaos,
George Alexiou,
Dimitris Nikolos,
D. Lymperopoulos:
EUDOXUS: A WWW-based Generator of Reusable Arithmetic Cores.
IEEE International Workshop on Rapid System Prototyping 2001: 182-187 |
2000 |
6 | EE | Dimitris Bakalis,
Dimitris Nikolos,
George Alexiou,
Emmanouil Kalligeros,
Haridimos T. Vergos:
Low Power BIST for Wallace Tree-Based Fast Multipliers.
ISQED 2000: 433-438 |
1999 |
5 | EE | Xrysovalantis Kavousianos,
Dimitris Bakalis,
Haridimos T. Vergos,
Dimitris Nikolos,
George Alexiou:
Low Power Dissipation in BIST Schemes for Modified Booth Multipliers.
DFT 1999: 121-129 |
4 | EE | A. Vasilliou,
K. Gounaris,
K. Adaos,
D. Mitsainas,
George Alexiou,
Dimitris Nikolos:
Development of a Reusable E1 Transceiver Suitable for Rapid Prototyping.
IEEE International Workshop on Rapid System Prototyping 1999: 21- |
1998 |
3 | EE | K. Adaos,
George Alexiou,
Nick Kanopoulos:
An Extensible, Low Cost Rapid Prototyping Environment Based on a Reconfigurable Set of FPGAs.
International Workshop on Rapid System Prototyping 1998: 78-83 |
1995 |
2 | EE | Theodore Karoubalis,
George Alexiou,
Nick Kanopoulos:
Optimal synthesis of differential cascode voltage switch (DCVS) logic circuits using ordered binary decision diagrams (OBDDs).
EURO-DAC 1995: 282-287 |
1994 |
1 | | George Alexiou,
Dimitrios Stiliadis,
Nick Kanopoulos:
Design and Implementation of a High-Performance, Modular, Sorting Engine.
EDAC-ETC-EUROASIC 1994: 2-8 |