Srilatha Manne

2008
14	EE	Ravi Bhargava, Ben Serebrin, Francesco Spadini, Srilatha Manne: Accelerating two-dimensional page walks for virtualized systems. ASPLOS 2008: 26-35
2007
13	EE	Paul Racunas, Kypros Constantinides, Srilatha Manne, Shubhendu S. Mukherjee: Perturbation-based Fault Screening. HPCA 2007: 169-180
2002
12	EE	Eric Borch, Eric Tune, Srilatha Manne, Joel S. Emer: Loose Loops Sink Chips. HPCA 2002: 299-310
11	EE	Joel S. Emer, Pritpal Ahuja, Eric Borch, Artur Klauser, Chi-Keung Luk, Srilatha Manne, Shubhendu S. Mukherjee, Harish Patil, Steven Wallace, Nathan L. Binkert, Roger Espasa, Toni Juan: Asim: A Performance Model Framework. IEEE Computer 35(2): 68-76 (2002)
2001
10	EE	R. Iris Bahar, Srilatha Manne: Power and energy reduction via pipeline balancing. ISCA 2001: 218-229
9		Artur Klauser, Srilatha Manne, Dirk Grunwald: Selective Branch Inversion: Confidence Estimation for Branch Predictors. International Journal of Parallel Programming 29(1): 81-110 (2001)
1999
8	EE	Srilatha Manne, Artur Klauser, Dirk Grunwald: Branch Prediction Using Selective Branch Inversion. IEEE PACT 1999: 48-56
1998
7	EE	Dirk Grunwald, Artur Klauser, Srilatha Manne, Andrew R. Pleszkun: Confidence Estimation for Speculation Control. ISCA 1998: 122-131
6	EE	Srilatha Manne, Artur Klauser, Dirk Grunwald: Pipeline Gating: Speculation Control for Energy Reduction. ISCA 1998: 132-141
5	EE	R. Iris Bahar, Gianluca Albera, Srilatha Manne: Power and performance tradeoffs using various caching strategies. ISLPED 1998: 64-69
1997
4	EE	Srilatha Manne, Dirk Grunwald, Fabio Somenzi: Remembrance of Things Past: Locality and Memory in BDDs. DAC 1997: 196-201
1996
3	EE	Olivier Coudert, Ramsey W. Haddad, Srilatha Manne: New Algorithms for Gate Sizing: A Comparative Study. DAC 1996: 734-739
1995
2	EE	Srilatha Manne, Abelardo Pardo, R. Iris Bahar, Gary D. Hachtel, Fabio Somenzi, Enrico Macii, Massimo Poncino: Computing the Maximum Power Cycles of a Sequential Circuit. DAC 1995: 23-28
1	EE	Abelardo Pardo, R. Iris Bahar, Srilatha Manne, Peter Feldmann, Gary D. Hachtel, Fabio Somenzi: CMOS dynamic power estimation based on collapsible current source transistor modeling. ISLPD 1995: 111-116

Coauthor Index

1	Pritpal Ahuja	[11]
2	Gianluca Albera	[5]
3	R. Iris Bahar	[1] [2] [5] [10]
4	Ravi Bhargava	[14]
5	Nathan L. Binkert	[11]
6	Eric Borch	[11] [12]
7	Kypros Constantinides	[13]
8	Olivier Coudert	[3]
9	Joel S. Emer	[11] [12]
10	Roger Espasa	[11]
11	Peter Feldmann	[1]
12	Dirk Grunwald	[4] [6] [7] [8] [9]
13	Gary D. Hachtel	[1] [2]
14	Ramsey W. Haddad	[3]
15	Toni Juan	[11]
16	Artur Klauser	[6] [7] [8] [9] [11]
17	Chi-Keung Luk	[11]
18	Enrico Macii	[2]
19	Shubhendu S. Mukherjee	[11] [13]
20	Abelardo Pardo	[1] [2]
21	Harish Patil	[11]
22	Andrew R. Pleszkun	[7]
23	Massimo Poncino	[2]
24	Paul Racunas	[13]
25	Ben Serebrin	[14]
26	Fabio Somenzi	[1] [2] [4]
27	Francesco Spadini	[14]
28	Eric Tune	[12]
29	Steven Wallace	[11]

Colors in the list of coauthors