| 2009 |
|---|
| 6 | EE | Satish Sivaswamy,
Kia Bazargan,
Marc D. Riedel:
Estimation and optimization of reliability of noisy digital circuits.
ISQED 2009: 213-219 |
| 2008 |
|---|
| 5 | EE | Satish Sivaswamy,
Kia Bazargan:
Statistical Analysis and Process Variation-Aware Routing and Skew Assignment for FPGAs.
TRETS 1(1): (2008) |
| 2007 |
|---|
| 4 | EE | Satish Sivaswamy,
Kia Bazargan:
Variation-aware routing for FPGAs.
FPGA 2007: 71-79 |
| 3 | EE | Satish Sivaswamy,
Kia Bazargan:
Statistical Generic And Chip-Specific Skew Assignment for Improving Timing Yield of FPGAs.
FPL 2007: 429-434 |
| 2006 |
|---|
| 2 | EE | Gang Wang,
Satish Sivaswamy,
Cristinel Ababei,
Kia Bazargan,
Ryan Kastner,
Elaheh Bozorgzadeh:
Statistical Analysis and Design of HARP FPGAs.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2088-2102 (2006) |
| 2005 |
|---|
| 1 | EE | Satish Sivaswamy,
Gang Wang,
Cristinel Ababei,
Kia Bazargan,
Ryan Kastner,
Eli Bozorgzadeh:
HARP: hard-wired routing pattern FPGAs.
FPGA 2005: 21-29 |
