| 2008 |
|---|
| 10 | EE | José González,
Qiong Cai,
Pedro Chaparro,
Grigorios Magklis,
Ryan Rakvic,
Antonio González:
Thread fusion.
ISLPED 2008: 363-368 |
| 9 | EE | Qiong Cai,
José González,
Ryan Rakvic,
Grigorios Magklis,
Pedro Chaparro,
Antonio González:
Meeting points: using thread criticality to adapt multicore hardware to parallel regions.
PACT 2008: 240-249 |
| 2006 |
|---|
| 8 | EE | Richard A. Hankins,
Gautham N. Chinya,
Jamison D. Collins,
Perry H. Wang,
Ryan Rakvic,
Hong Wang,
John Paul Shen:
Multiple Instruction Stream Processor.
ISCA 2006: 114-127 |
| 7 | EE | Jinzhan Peng,
Guei-Yuan Lueh,
Gansha Wu,
Xiaogang Gou,
Ryan Rakvic:
A comprehensive study of hardware/software approaches to improve TLB performance for java applications on embedded systems.
Memory System Performance and Correctness 2006: 102-111 |
| 2004 |
|---|
| 6 | EE | Murali Annavaram,
Ryan Rakvic,
Marzia Polito,
Jean-Yves Bouguet,
Richard A. Hankins,
Bob Davies:
The Fuzzy Correlation between Code and Performance Predictability.
MICRO 2004: 93-104 |
| 2002 |
|---|
| 5 | EE | Ryan Rakvic,
Bryan Black,
Deepak Limaye,
John Paul Shen:
Non-Vital Loads.
HPCA 2002: 165- |
| 4 | EE | Youfeng Wu,
Ryan Rakvic,
Li-Ling Chen,
Chyi-Chang Miao,
George Chrysos,
Jesse Fang:
Compiler managed micro-cache bypassing for high performance EPIC processors.
MICRO 2002: 134-145 |
| 2001 |
|---|
| 3 | | Deepak Limaye,
Ryan Rakvic,
John Paul Shen:
Parallel Cachelets.
ICCD 2001: 284-292 |
| 2000 |
|---|
| 2 | EE | Ryan Rakvic,
Bryan Black,
John Paul Shen:
Completion time multiple branch prediction for enhancing trace cache performance.
ISCA 2000: 47-58 |
| 1998 |
|---|
| 1 | EE | Bryan Black,
Brian Mueller,
Stephanie Postal,
Ryan Rakvic,
Noppanunt Utamaphethai,
John Paul Shen:
Load Execution Latency Reduction.
International Conference on Supercomputing 1998: 29-36 |
