2009 |
33 | EE | Siddhartha Chhabra,
Brian Rogers,
Yan Solihin,
Milos Prvulovic:
Making secure processors OS- and performance-friendly.
TACO 5(4): (2009) |
2008 |
32 | EE | Brian Rogers,
Chenyu Yan,
Siddhartha Chhabra,
Milos Prvulovic,
Yan Solihin:
Single-level integrity and confidentiality protection for distributed shared memory multiprocessors.
HPCA 2008: 161-172 |
31 | EE | Guru Venkataramani,
Ioannis Doudalis,
Yan Solihin,
Milos Prvulovic:
FlexiTaint: A programmable accelerator for dynamic taint propagation.
HPCA 2008: 173-184 |
30 | EE | Fang Liu,
Fei Guo,
Yan Solihin,
Seongbeom Kim,
Abdulaziz Eker:
Characterizing and modeling the behavior of context switch misses.
PACT 2008: 91-101 |
29 | EE | Mazen Kharbutli,
Yan Solihin:
Counter-Based Cache Replacement and Bypassing Algorithms.
IEEE Trans. Computers 57(4): 433-447 (2008) |
2007 |
28 | EE | Guru Venkataramani,
Brandyn Roemer,
Yan Solihin,
Milos Prvulovic:
MemTracker: Efficient and Programmable Support for Memory Access Monitoring and Debugging.
HPCA 2007: 273-284 |
27 | EE | Yan Solihin,
Fei Guo,
Seongbeom Kim,
Fang Liu:
Supporting Quality of Service in High-Performance Servers.
IPDPS 2007: 1-6 |
26 | EE | Seongbeom Kim,
Fang Liu,
Yan Solihin,
Ravi R. Iyer,
Li Zhao,
W. Cohen:
Accelerating Full-System Simulation through Characterizing and Predicting Operating System Performance.
ISPASS 2007: 1-11 |
25 | EE | Brian Rogers,
Siddhartha Chhabra,
Milos Prvulovic,
Yan Solihin:
Using Address Independent Seed Encryption and Bonsai Merkle Trees to Make Secure Processors OS- and Performance-Friendly.
MICRO 2007: 183-196 |
24 | EE | Fei Guo,
Yan Solihin,
Li Zhao,
Ravishankar Iyer:
A Framework for Providing Quality of Service in Chip Multi-Processors.
MICRO 2007: 343-355 |
23 | EE | Ravi R. Iyer,
Li Zhao,
Fei Guo,
Ramesh Illikkal,
Srihari Makineni,
Donald Newell,
Yan Solihin,
Lisa R. Hsu,
Steven K. Reinhardt:
QoS policies and architecture for cache/memory in CMP platforms.
SIGMETRICS 2007: 25-36 |
22 | EE | Mohit Gambhir,
Edward F. Gehringer,
Yan Solihin:
Animations of important concepts in parallel computer architecture.
WCAE 2007: 23-29 |
2006 |
21 | EE | Mazen Kharbutli,
Xiaowei Jiang,
Yan Solihin,
Guru Venkataramani,
Milos Prvulovic:
Comprehensively and efficiently protecting the heap.
ASPLOS 2006: 207-218 |
20 | EE | Changhee Jung,
Daeseob Lim,
Jaejin Lee,
Yan Solihin:
Helper thread prefetching for loosely-coupled multiprocessor systems.
IPDPS 2006 |
19 | EE | Chenyu Yan,
Daniel Englender,
Milos Prvulovic,
Brian Rogers,
Yan Solihin:
Improving Cost, Performance, and Security of Memory Encryption and Authentication.
ISCA 2006: 179-190 |
18 | EE | Brian Rogers,
Milos Prvulovic,
Yan Solihin:
Efficient data protection for distributed shared memory multiprocessors.
PACT 2006: 84-94 |
17 | EE | Fei Guo,
Yan Solihin:
An analytical model for cache replacement policy performance.
SIGMETRICS/Performance 2006: 228-239 |
16 | EE | Rithin Shetty,
Mazen Kharbutli,
Yan Solihin,
Milos Prvulovic:
HeapMon: A helper-thread approach to programmable, automatic, and low-overhead memory bug detection.
IBM Journal of Research and Development 50(2-3): 261-276 (2006) |
2005 |
15 | EE | Dhruba Chandra,
Fei Guo,
Seongbeom Kim,
Yan Solihin:
Predicting Inter-Thread Cache Contention on a Chip Multi-Processor Architecture.
HPCA 2005: 340-351 |
14 | EE | Mazen Kharbutli,
Yan Solihin:
Counter-Based Cache Replacement Algorithms.
ICCD 2005: 61-68 |
13 | EE | Yan Solihin,
Fei Guo,
Seongbeom Kim:
Predicting Cache Space Contention in Utility Computing Servers.
IPDPS 2005 |
12 | EE | Mazen Kharbutli,
Yan Solihin,
Jaejin Lee:
Eliminating Conflict Misses Using Prime Number-Based Cache Indexing.
IEEE Trans. Computers 54(5): 573-586 (2005) |
11 | EE | Brian Rogers,
Yan Solihin,
Milos Prvulovic:
Memory predecryption: hiding the latency overhead of memory encryption.
SIGARCH Computer Architecture News 33(1): 27-33 (2005) |
2004 |
10 | EE | Mazen Kharbutli,
Keith Irwin,
Yan Solihin,
Jaejin Lee:
Using Prime Numbers for Cache Indexing to Eliminate Conflict Misses.
HPCA 2004: 288-299 |
9 | EE | Seongbeom Kim,
Dhruba Chandra,
Yan Solihin:
Fair Cache Sharing and Partitioning in a Chip Multiprocessor Architecture.
IEEE PACT 2004: 111-122 |
2003 |
8 | EE | Yan Solihin,
Jaejin Lee,
Josep Torrellas:
Correlation Prefetching with a User-Level Memory Thread.
IEEE Trans. Parallel Distrib. Syst. 14(6): 563-580 (2003) |
2002 |
7 | EE | Yan Solihin,
Josep Torrellas,
Jaejin Lee:
Using a User-Level Memory Thread for Correlation Prefetching.
ISCA 2002: 171-182 |
2001 |
6 | EE | Jaejin Lee,
Yan Solihin,
Josep Torrellas:
Automatically Mapping Code on an Intelligent Memory Architecture.
HPCA 2001: 121- |
5 | | Yan Solihin,
Kirk W. Cameron,
Yong Luo,
Dominique Lavenier,
Maya Gokhale:
Mutable Functional Units and Their Applications on Microprocessors.
ICCD 2001: 234-239 |
4 | EE | Yan Solihin,
Jaejin Lee,
Josep Torrellas:
Automatic Code Mapping on an Intelligent Memory Architecture.
IEEE Trans. Computers 50(11): 1248-1266 (2001) |
2000 |
3 | EE | Yan Solihin,
Jaejin Lee,
Josep Torrellas:
Adaptively Mapping Code in an Intelligent Memory Architecture.
Intelligent Memory Systems 2000: 71-84 |
1999 |
2 | EE | Yan Solihin,
C. G. Leedham:
Integral Ratio: A New Class of Global Thresholding Techniques for Handwriting Images.
IEEE Trans. Pattern Anal. Mach. Intell. 21(8): 761-768 (1999) |
1997 |
1 | EE | Yan Solihin,
Graham Leedham:
Mathematical properties of the native integral ratio handwriting and text extraction technique.
ICDAR 1997: 1102- |