2009 | ||
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14 | EE | Perry H. Wang, Jamison D. Collins, Christopher T. Weaver, Blliappa Kuttanna, Shahram Salamian, Gautham N. Chinya, Ethan Schuchman, Oliver Schilling, Thorsten Doil, Sebastian Steibl, Hong Wang: Intel® atomTM processor core made FPGA-synthesizable. FPGA 2009: 209-218 |
2008 | ||
13 | EE | Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aamodt, Jamison D. Collins, Perry H. Wang, Gautham N. Chinya, Ankur Khandelwal Groen, Hong Jiang, Hong Wang: Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor. PACT 2008: 52-61 |
2007 | ||
12 | EE | Perry H. Wang, Jamison D. Collins, Gautham N. Chinya, Bernard Lint, Asit Mallick, Koichi Yamada, Hong Wang: Sequencer virtualization. ICS 2007: 148-157 |
11 | EE | Perry H. Wang, Jamison D. Collins, Gautham N. Chinya, Hong Jiang, Xinmin Tian, Milind Girkar, Nick Y. Yang, Guei-Yuan Lueh, Hong Wang: EXOCHI: architecture and programming environment for a heterogeneous multi-core multithreaded system. PLDI 2007: 156-166 |
2006 | ||
10 | EE | Richard A. Hankins, Gautham N. Chinya, Jamison D. Collins, Perry H. Wang, Ryan Rakvic, Hong Wang, John Paul Shen: Multiple Instruction Stream Processor. ISCA 2006: 114-127 |
2005 | ||
9 | EE | Satish Narayanasamy, Hong Wang, Perry H. Wang, John Paul Shen, Brad Calder: A Dependency Chain Clustered Microarchitecture. IPDPS 2005 |
2004 | ||
8 | EE | Perry H. Wang, Jamison D. Collins, Hong Wang, Dongkeun Kim, Bill Greene, Kai-Ming Chan, Aamir B. Yunus, Terry Sych, Stephen F. Moore, John Paul Shen: Helper threads via virtual multithreading on an experimental itanium® 2 processor-based platform. ASPLOS 2004: 144-155 |
7 | EE | Dongkeun Kim, Shih-Wei Liao, Perry H. Wang, Juan del Cuvillo, Xinmin Tian, Xiang Zou, Hong Wang, Donald Yeung, Milind Girkar, John Paul Shen: Physical Experimentation with Prefetching Helper Threads on Intel's Hyper-Threaded Processors. CGO 2004: 27-38 |
6 | EE | Perry H. Wang, Jamison D. Collins, Hong Wang, Dongkeun Kim, Bill Greene, Kai-Ming Chan, Aamir B. Yunus, Terry Sych, Stephen F. Moore, John Paul Shen: Helper Threads via Virtual Multithreading. IEEE Micro 24(6): 74-82 (2004) |
2003 | ||
5 | EE | Hong Wang, Shiri Manor, Dave LaFollette, Nadav Nesher, Ku-jei King, Perry H. Wang, Shay Levy, Shai Satt, Gal Carmeli, Arjun Kapur, Ioannis Schoinas, Ed Rubinstein, Rahul Bhatt: Inferno: a functional simulation infrastructure for modeling microarchitectural data speculations. ISPASS 2003: 11-21 |
2002 | ||
4 | EE | Perry H. Wang, Hong Wang, Jamison D. Collins, Ed Grochowski, Ralph-Michael Kling, John Paul Shen: Memory Latency-Tolerance Approaches for Itanium Processors: Out-of-Order Execution vs. Speculative Precomputation. HPCA 2002: 187-196 |
3 | EE | R. David Weldon, Steven S. Chang, Hong Wang, Gerolf Hoflehner, Perry H. Wang, Daniel M. Lavery, John Paul Shen: Quantitative Evaluation of the Register Stack Engine and Optimizations for Future Itanium Processors. Interaction between Compilers and Computer Architectures 2002: 57-67 |
2 | EE | Shih-Wei Liao, Perry H. Wang, Hong Wang, John Paul Shen, Gerolf Hoflehner, Daniel M. Lavery: Post-Pass Binary Adaptation for Software-Based Speculative Precomputation. PLDI 2002: 117-128 |
2001 | ||
1 | EE | Perry H. Wang, Hong Wang, Ralph-Michael Kling, Kalpana Ramakrishnan, John Paul Shen: Register Renaming and Scheduling for Dynamic Execution of Predicated Code. HPCA 2001: 15-26 |