Hisatada Miyataka
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1995
1
EE
Peter M. Kogge
,
Toshio Sunaga
, Hisatada Miyataka,
Koji Kitamura
,
Eric Retter
: Combined DRAM and logic chip for massively parallel systems.
ARVLSI 1995
: 4-16
Coauthor
Index
1
Koji Kitamura
[
1
]
2
Peter M. Kogge
[
1
]
3
Eric Retter
[
1
]
4
Toshio Sunaga
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
