| |
| 1995 | ||
|---|---|---|
| 1 | EE | Peter M. Kogge, Toshio Sunaga, Hisatada Miyataka, Koji Kitamura, Eric Retter: Combined DRAM and logic chip for massively parallel systems. ARVLSI 1995: 4-16 |
| 1 | Koji Kitamura | [1] |
| 2 | Peter M. Kogge | [1] |
| 3 | Hisatada Miyataka | [1] |
| 4 | Toshio Sunaga | [1] |