Dmitry V. Ponomarev

Dmitry Ponomarev

2008
43		Vladimir Krylov, N. Mikhaylov, Dmitry V. Ponomarev: New Architecture and Protocols for Global-Scale Machine Communities. CAINE 2008: 118-123
42		Vladimir Krylov, Dmitry V. Ponomarev, A. Logvinov, A. Ponomarrenko: Active Database Architecture for XML Documents. CAINE 2008: 244-249
41	EE	Jason Loew, Dmitry Ponomarev: Two-Level Reorder Buffers: Accelerating Memory-Bound Applications on SMT Architectures. ICPP 2008: 182-189
40		Vladimir Krylov, A. Logvinov, A. Ponomarrenko, Dmitry Ponomarev: Metrized Small World Properties Based Data Structure. SEDE 2008: 203-208
39	EE	Deniz Balkan, Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghose: Predicting and Exploiting Transient Values for Reducing Register File Pressure and Energy Consumption. IEEE Trans. Computers 57(1): 82-95 (2008)
38	EE	Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose: Selective Writeback: Reducing Register File Pressure and Energy Consumption. IEEE Trans. VLSI Syst. 16(6): 650-661 (2008)
37	EE	Joseph J. Sharkey, Jason Loew, Dmitry V. Ponomarev: Reducing register pressure in SMT processors through L2-miss-driven early register release. TACO 5(3): (2008)
2007
36	EE	Joseph J. Sharkey, Dmitry V. Ponomarev: An L2-miss-driven early register deallocation for SMT processors. ICS 2007: 138-147
35	EE	Joseph J. Sharkey, Dmitry V. Ponomarev: Exploiting Operand Availability for Efficient Simultaneous Multithreading. IEEE Trans. Computers 56(2): 208-223 (2007)
2006
34	EE	Joseph J. Sharkey, Dmitry V. Ponomarev: Efficient instruction schedulers for SMT processors. HPCA 2006: 288-298
33	EE	Joseph J. Sharkey, Nayef Abu-Ghazeleh, Dmitry V. Ponomarev, Kanad Ghose, Aneesh Aggarwal: Trade-Offs in Transient Fault Recovery Schemes for Redundant Multithreaded Processors. HiPC 2006: 135-147
32	EE	Joseph J. Sharkey, Dmitry Ponomarev: Balancing ILP and TLP in SMT Architectures through Out-of-Order Instruction Dispatch. ICPP 2006: 329-336
31	EE	Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Aneesh Aggarwal: Address-Value Decoupling for Early Register Deallocation. ICPP 2006: 337-346
30	EE	Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose: Selective writeback: exploiting transient values for energy-efficiency and performance. ISLPED 2006: 37-42
29	EE	Joseph J. Sharkey, Deniz Balkan, Dmitry Ponomarev: Adaptive reorder buffers for SMT processors. PACT 2006: 244-253
28	EE	Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose: SPARTAN: speculative avoidance of register allocations to transient values for performance and energy efficiency. PACT 2006: 265-274
27	EE	Dmitry V. Ponomarev, Gurhan Kucuk, Kanad Ghose: Dynamic Resizing of Superscalar Datapath Components for Energy Efficiency. IEEE Trans. Computers 55(2): 199-213 (2006)
26	EE	Oguz Ergin, Deniz Balkan, Dmitry Ponomarev, Kanad Ghose: Early Register Deallocation Mechanisms Using Checkpointed Register Files. IEEE Trans. Computers 55(9): 1153-1166 (2006)
25	EE	Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghose, Oguz Ergin: Instruction packing: Toward fast and energy-efficient instruction scheduling. TACO 3(2): 156-181 (2006)
2005
24	EE	Joseph J. Sharkey, Dmitry V. Ponomarev: Non-uniform Instruction Scheduling. Euro-Par 2005: 540-549
23	EE	Joseph J. Sharkey, Dmitry V. Ponomarev: Instruction Recirculation: Eliminating Counting Logic in Wakeup-Free Schedulers. Euro-Par 2005: 550-559
22	EE	Joseph J. Sharkey, Kanad Ghose, Dmitry V. Ponomarev, Oguz Ergin: Power-Efficient Wakeup Tag Broadcast. ICCD 2005: 654-661
21	EE	Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghose, Oguz Ergin: Instruction packing: reducing power and delay of the dynamic scheduling logic. ISLPED 2005: 30-35
2004
20	EE	Oguz Ergin, Deniz Balkan, Dmitry V. Ponomarev, Kanad Ghose: Increasing Processor Performance Through Early Register Release. ICCD 2004: 480-487
19		Dmitry Ponomarev, Vladimir Krylov: Web Mapping of Real-World Things and its Applications - Product WEBID as a Driving Force for new Supply Chains. ICETE (1) 2004: 263-267
18	EE	Oguz Ergin, Deniz Balkan, Kanad Ghose, Dmitry V. Ponomarev: Register Packing: Exploiting Narrow-Width Operands for Reducing Register File Pressure. MICRO 2004: 304-315
17	EE	Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose, Oguz Ergin: Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization. PACS 2004: 15-29
16	EE	Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad Ghose: Complexity-Effective Reorder Buffer Designs for Superscalar Processors. IEEE Trans. Computers 53(6): 653-665 (2004)
15	EE	Dmitry V. Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose: Isolating Short-Lived Operands for Energy Reduction. IEEE Trans. Computers 53(6): 697-709 (2004)
14	EE	Dmitry V. Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose: Energy Efficient Comparators for Superscalar Datapaths. IEEE Trans. Computers 53(7): 892-904 (2004)
2003
13	EE	Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad Ghose: Distributed Reorder Buffer Schemes for Low Power. ICCD 2003: 364-370
12	EE	Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose: Reducing Datapath Energy through the Isolation of Short-Lived Operands. IEEE PACT 2003: 258-268
11	EE	Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad Ghose: Reducing reorder buffer complexity through selective operand caching. ISLPED 2003: 235-240
10	EE	Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose: Power efficient comparators for long arguments in superscalar processors. ISLPED 2003: 378-383
9	EE	Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad Ghose: Energy Efficient Register Renaming. PATMOS 2003: 219-228
8	EE	Dmitry V. Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose, Peter M. Kogge: Energy-efficient issue queue design. IEEE Trans. VLSI Syst. 11(5): 789-800 (2003)
2002
7	EE	Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose: AccuPower: An Accurate Power Estimation Tool for Superscalar Microprocessors. DATE 2002: 124-131
6	EE	Oguz Ergin, Kanad Ghose, Gurhan Kucuk, Dmitry Ponomarev: A Circuit-Level Implementation of Fast, Energy-Efficient CMOS Comparators for High-Performance Microprocessors. ICCD 2002: 118-121
5	EE	Gurhan Kucuk, Dmitry Ponomarev, Kanad Ghose: Low-complexity reorder buffer architecture. ICS 2002: 57-66
4	EE	Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose: Energy-Efficient Design of the Reorder Buffer. PATMOS 2002: 289-299
2001
3	EE	Dmitry Ponomarev, Kanad Ghose, Eugeny Saksonov: Optimal Polling for Latency-Throughput Tradeoffs in Queue-Based Network Interfaces for Clusters. Euro-Par 2001: 86-95
2	EE	Gurhan Kucuk, Kanad Ghose, Dmitry Ponomarev, Peter M. Kogge: Energy: efficient instruction dispatch buffer design for superscalar processors. ISLPED 2001: 237-242
1	EE	Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose: Reducing power requirements of instruction scheduling through dynamic allocation of multiple datapath resources. MICRO 2001: 90-101

Coauthor Index

1	Nayef Abu-Ghazeleh	[33]
2	Aneesh Aggarwal	[31] [33]
3	Deniz Balkan	[18] [20] [26] [28] [29] [30] [31] [38] [39]
4	Oguz Ergin	[6] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [20] [21] [22] [25] [26]
5	Kanad Ghose	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [20] [21] [22] [25] [26] [27] [28] [30] [33] [38] [39]
6	Peter M. Kogge	[2] [8]
7	Vladimir Krylov	[19] [40] [42] [43]
8	Gürhan Küçük (Gurhan Kucuk)	[1] [2] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [27]
9	Jason Loew	[37] [41]
10	A. Logvinov	[40] [42]
11	N. Mikhaylov	[43]
12	A. Ponomarrenko	[40] [42]
13	Eugeny Saksonov	[3]
14	Joseph J. Sharkey	[17] [21] [22] [23] [24] [25] [28] [29] [30] [31] [32] [33] [34] [35] [36] [37] [38] [39]

Colors in the list of coauthors