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Lambert Schaelicke

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2009
15EEMatthew A. Watkins, Sally A. McKee, Lambert Schaelicke: Revisiting Cache Block Superloading. HiPEAC 2009: 339-354
2007
14EEMatthew A. Watkins, Sally A. McKee, Lambert Schaelicke: A Phase-Adaptive Approach to Increasing Cache Performance. PACT 2007: 432
2006
13EELambert Schaelicke, Alan L. Davis: Design Trade-Offs for User-Level I/O Architectures. IEEE Trans. Computers 55(8): 962-973 (2006)
12EELambert Schaelicke, Michael Parker: The design and utility of the ML-RSIM system simulator. Journal of Systems Architecture 52(5): 283-297 (2006)
2005
11EELambert Schaelicke, Kyle Wheeler, Curt Freeland: SPANIDS: a scalable network intrusion detection loadbalancer. Conf. Computing Frontiers 2005: 315-322
10EELambert Schaelicke: Evaluating the impact of the simulation environment on experimentation results. Perform. Eval. 61(4): 329-346 (2005)
2004
9EETimothy J. Dysart, Branden J. Moore, Lambert Schaelicke, Peter M. Kogge: Cache implications of aggressively pipelined high performance microprocessors. ISPASS 2004: 123-132
2003
8EEBranden J. Moore, Thomas Slabach, Lambert Schaelicke: Profiling Interrupt Handler Performance through Kernel Instrumentation. ICCD 2003: 156-163
7EELambert Schaelicke, Thomas Slabach, Branden J. Moore, Curt Freeland: Characterizing the Performance of Network Intrusion Detection Sensors. RAID 2003: 155-172
2001
6EELixin Zhang, Zhen Fang, Michael Parker, Binu K. Mathew, Lambert Schaelicke, John B. Carter, Wilson C. Hsieh, Sally A. McKee: The Impulse Memory Controller. IEEE Trans. Computers 50(11): 1117-1132 (2001)
2000
5EELambert Schaelicke, Al Davis, Sally A. McKee: Profiling I/O Interrupts in Modern Architectures. MASCOTS 2000: 115-123
1999
4EEJohn B. Carter, Wilson C. Hsieh, Leigh Stoller, Mark R. Swanson, Lixin Zhang, Erik Brunvand, Al Davis, Chen-Chi Kuo, Ravindra Kuramkote, Michael Parker, Lambert Schaelicke, Terry Tateyama: Impulse: Building a Smarter Memory Controller. HPCA 1999: 70-79
1998
3EEJohn B. Carter, Wilson C. Hsieh, Mark R. Swanson, Lixin Zhang, Erik Brunvand, Al Davis, Chen-Chi Kuo, Ravindra Kuramkote, Michael Parker, Lambert Schaelicke, Leigh Stoller, Terry Tateyama: Memory System Support for Irregular Applications. LCR 1998: 17-26
2EELambert Schaelicke, Al Davis: Improving I/O Performance with a Conditional Store Buffer. MICRO 1998: 160-169
1997
1EEUlrich Brüning, Lambert Schaelicke: ATOLL: A High-Performance Communication Device for Massively Parallel Systems. APDC 1997: 228-234

Coauthor Index

1Ulrich Brüning [1]
2Erik Brunvand [3] [4]
3John B. Carter [3] [4] [6]
4Al Davis [2] [3] [4] [5]
5Alan L. Davis [13]
6Timothy J. Dysart [9]
7Zhen Fang [6]
8Curt Freeland [7] [11]
9Wilson C. Hsieh [3] [4] [6]
10Peter M. Kogge [9]
11Chen-Chi Kuo [3] [4]
12Ravindra Kuramkote [3] [4]
13Binu K. Mathew [6]
14Sally A. McKee [5] [6] [14] [15]
15Branden J. Moore [7] [8] [9]
16Michael Parker [3] [4] [6] [12]
17Thomas Slabach [7] [8]
18Leigh Stoller [3] [4]
19Mark R. Swanson [3] [4]
20Terry Tateyama [3] [4]
21Matthew A. Watkins [14] [15]
22Kyle Wheeler [11]
23Lixin Zhang [3] [4] [6]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)