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| 2006 | ||
|---|---|---|
| 3 | EE | Michael Moreinis, Arkadiy Morgenshtein, Israel A. Wagner, Avinoam Kolodny: Logic Gates as Repeaters (LGR) for Area-Efficient Timing Optimization. IEEE Trans. VLSI Syst. 14(11): 1276-1281 (2006) |
| 2004 | ||
| 2 | EE | Arkadiy Morgenshtein, Michael Moreinis, Ran Ginosar: Asynchronous gate-diffusion-input (GDI) circuits. IEEE Trans. VLSI Syst. 12(8): 847-856 (2004) |
| 2003 | ||
| 1 | Arkadiy Morgenshtein, Michael Moreinis, Israel A. Wagner, Avinoam Kolodny: Logic Gates as Repeaters (LGR) for Timing Optimization of SoC Interconnects. VLSI-SOC 2003: 99-104 | |
| 1 | Ran Ginosar | [2] |
| 2 | Avinoam Kolodny | [1] [3] |
| 3 | Arkadiy Morgenshtein | [1] [2] [3] |
| 4 | Israel A. Wagner | [1] [3] |