| 2004 | 
| 5 | EE | Alex Branover,
Rakefet Kol,
Ran Ginosar:
Asynchronous Design By Conversion: Converting Synchronous Circuits into Asynchronous Ones.
DATE 2004: 870-877 | 
| 1999 | 
| 4 | EE | Shai Rotem,
Ken S. Stevens,
Charles Dike,
Marly Roncken,
Boris Agapiev,
Ran Ginosar,
Rakefet Kol,
Peter A. Beerel,
Chris J. Myers,
Kenneth Y. Yun:
RAPPID: An Asynchronous Instruction Length Decoder.
ASYNC 1999: 60-70 | 
| 1998 | 
| 3 | EE | Wei-Chun Chou,
Peter A. Beerel,
Ran Ginosar,
Rakefet Kol,
Chris J. Myers,
Shai Rotem,
Ken S. Stevens,
Kenneth Y. Yun:
Average-Case Optimized Technology Mapping of One-Hot Domino CircuitsAverage-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits.
ASYNC 1998: 80- | 
| 2 | EE | Rakefet Kol,
Ran Ginosar:
Kin: A High Performance Asynchronous Processor Architecture.
International Conference on Supercomputing 1998: 433-440 | 
| 1997 | 
| 1 |   | Rakefet Kol,
Ran Ginosar:
A Double-Latched Asynchronous Pipeline.
ICCD 1997: 706-712 |