2008 | ||
---|---|---|
39 | EE | Lu Peng, Jih-Kwon Peir, Tribuvan K. Prakash, Carl Staelin, Yen-Kuang Chen, David M. Koppelman: Memory hierarchy performance measurement of commercial dual-core desktop processors. Journal of Systems Architecture - Embedded Systems Design 54(8): 816-828 (2008) |
2007 | ||
38 | EE | Feiqi Su, Xudong Shi, Gang Liu, Ye Xia, Jih-Kwon Peir: Comparative evaluation of multi-core cache occupancy strategies. ICPADS 2007: 1-8 |
37 | EE | Lu Peng, Jih-Kwon Peir, Tribuvan K. Prakash, Yen-Kuang Chen, David M. Koppelman: Memory Performance and Scalability of Intel's and AMD's Dual-Core Processors: A Case Study. IPCCC 2007: 55-64 |
36 | EE | Xudong Shi, Feiqi Su, Jih-Kwon Peir, Ye Xia, Zhen Yang: Modeling and Single-Pass Simulation of CMP Cache Capacity and Accessibility. ISPASS 2007: 126-135 |
2006 | ||
35 | EE | Xudong Shi, Zhen Yang, Jih-Kwon Peir, Lu Peng, Yen-Kuang Chen, V. Lee, B. Liang: Coterminous locality and coterminous group data prefetching on chip-multiprocessors. IPDPS 2006 |
34 | EE | Zhen Yang, Xudong Shi, Feiqi Su, Jih-Kwon Peir: Overlapping dependent loads with addressless preload. PACT 2006: 275-284 |
2004 | ||
33 | EE | Lu Peng, Jih-Kwon Peir, Konrad Lai: Signature Buffer: Bridging Performance Gap between Registers and Caches. HPCA 2004: 164-175 |
2003 | ||
32 | EE | Lu Peng, Jih-Kwon Peir, Qianrong Ma, Konrad Lai: Address-free memory access based on program syntax correlation of loads and stores. IEEE Trans. VLSI Syst. 11(3): 314-324 (2003) |
2002 | ||
31 | EE | Shih-Chang Lai, Shih-Lien Lu, Jih-Kwon Peir: Ditto Processor. DSN 2002: 525-536 |
30 | EE | Jih-Kwon Peir, Shih-Chang Lai, Shih-Lien Lu, Jared Stark, Konrad Lai: Bloom filtering cache misses for accurate data speculation and prefetching. ICS 2002: 189-198 |
2001 | ||
29 | Qianrong Ma, Jih-Kwon Peir, Lu Peng, Konrad Lai: Symbolic Cache: Fast Memory Access Based on Program Syntax Correlation of Loads and Stores. ICCD 2001: 54-61 | |
28 | EE | Byung-Kwon Chung, Jinsuo Zhang, Jih-Kwon Peir, Shih-Chang Lai, Konrad Lai: Direct load: dependence-linked dataflow resolution of load address and cache coordinate. MICRO 2001: 76-87 |
1999 | ||
27 | Jang-uk In, Canming Jin, Jih-Kwon Peir, Sanjay Ranka, Sartaj Sahni: A Framework for Matching Applications with Parallel Machines. HiPC 1999: 331-338 | |
26 | EE | Jih-Kwon Peir, Windsor W. Hsu, Alan Jay Smith: Functional Implementation Techniques for CPU Cache Memories. IEEE Trans. Computers 48(2): 100-110 (1999) |
1998 | ||
25 | EE | Jih-Kwon Peir, Yongjoon Lee, Windsor W. Hsu: Capturing Dynamic Memory Reference Behavior with Adaptive Cache Topology. ASPLOS 1998: 240-250 |
24 | EE | Yunn Yen Chen, Jih-Kwon Peir, Chung-Ta King: Performance of Shared Caches on Multithreaded Architectures. J. Inf. Sci. Eng. 14(2): 499-514 (1998) |
1997 | ||
23 | Jih-Kwon Peir, Windsor W. Hsu: Fast Cache Access with Full-Map Block Directory. ICCD 1997: 578-586 | |
22 | Windsor W. Hsu, Jih-Kwon Peir: Busses. The Computer Science and Engineering Handbook 1997: 427-446 | |
1996 | ||
21 | Jih-Kwon Peir, Windsor W. Hsu, Honesty C. Young, Shauchi Ong: Improving Cache Performance with Balanced Tag and Data Paths. ASPLOS 1996: 268-278 | |
20 | EE | Yunn Yen Chen, Jih-Kwon Peir, Chung-Ta King: Performance of Shared Cache on Multithreaded Architectures. PDP 1996: 541-548 |
1993 | ||
19 | Jih-Kwon Peir, Kimming So, Ju-Ho Tang: Techniques to Enhance Cache Performance Across Parallel Program Sections. ICPP 1993: 12-19 | |
18 | Kien A. Hua, Lishing Liu, Jih-Kwon Peir: Designing High-Performance Processors Using Real Address Prediction. IEEE Trans. Computers 42(9): 1146-1151 (1993) | |
17 | EE | Lishing Liu, Jih-Kwon Peir: Cache sampling by sets. IEEE Trans. VLSI Syst. 1(2): 98-105 (1993) |
16 | EE | Wei-Tsung Sun, Yunn Yen Chen, Jih-Kwon Peir, Chung-Ta King: Shared Translation Lookaside Buffers on Multiprocessors and a Performance Study. J. Inf. Sci. Eng. 9(1): 123-135 (1993) |
15 | EE | Kien A. Hua, Chiang Lee, Jih-Kwon Peir: A High Performance Hybrid Architecture for Concurrent Query Execution. J. Inf. Sci. Eng. 9(2): 177-199 (1993) |
14 | Jih-Kwon Peir, Yann-Hang Lee: Look-Ahead Routing Switches for Multistage Interconnection Networks. J. Parallel Distrib. Comput. 19(1): 1-10 (1993) | |
1992 | ||
13 | Lishing Liu, Jih-Kwon Peir: Sampling of Cache Congruence Classes. ICCD 1992: 552-557 | |
1991 | ||
12 | Jih-Kwon Peir, Kimming So, Ju-Ho Tang: Inter-Section Locality of Shared Data in Parallel Programs. ICPP (1) 1991: 278-286 | |
11 | Yann-Hang Lee, Sandra E. Cheung, Jih-Kwon Peir: Consecutive Requests Traffic Model in Multistage Interconnection Networks. ICPP (1) 1991: 534-541 | |
10 | EE | Kien A. Hua, Chiang Lee, Jih-Kwon Peir: Interconnecting Shared-Everything Systems for Efficient Parallel Query Processing. PDIS 1991: 262-270 |
1990 | ||
9 | Lishing Liu, Jih-Kwon Peir: A Performance Evaluation Methodology for Coupled Multiple Supercomputers. ICPP (1) 1990: 198-202 | |
8 | EE | Kien A. Hua, Chiang Lee, Jih-Kwon Peir: A high performance hybrid architecture for concurrent query execution. SPDP 1990: 348-351 |
7 | EE | Jih-Kwon Peir, Yann-Hang Lee: Improving multistage network performance under uniform and hot-spot traffics. SPDP 1990: 548-551 |
1989 | ||
6 | Jih-Kwon Peir, Ron Cytron: Minimum Distance: A Method for Partitioning Recurrences for Multiprocessors. IEEE Trans. Computers 38(8): 1203-1211 (1989) | |
1987 | ||
5 | Jih-Kwon Peir, Ron Cytron: Minimum Distance: A Method for Partitioning Recurrences for Multiprocessors. ICPP 1987: 217-225 | |
4 | Hsiao-Ming Hsu, Jih-Kwon Peir, Dale B. Haidvogel: Performance of an Ocean Circulation Model on LCAP-Abstract. PPSC 1987: 285 | |
1986 | ||
3 | Jih-Kwon Peir, Daniel Gajski: CAMP: A Programming Aide for Multiprocessors. ICPP 1986: 475-482 | |
1985 | ||
2 | Daniel Gajski, Jih-Kwon Peir: Essential Issues in Multiprocessor Systems. IEEE Computer 18(6): 9-27 (1985) | |
1 | EE | Daniel Gajski, Jih-Kwon Peir: Comparison of five multiprocessor systems. Parallel Computing 2(3): 265-282 (1985) |