| |
| 2008 | ||
|---|---|---|
| 4 | EE | Sumeet Kumar, Aneesh Aggarwal: Speculative instruction validation for performance-reliability trade-off. HPCA 2008: 405-414 |
| 2006 | ||
| 3 | EE | Sumeet Kumar, Aneesh Aggarwal: Reducing resource redundancy for concurrent error detection techniques in high performance microprocessors. HPCA 2006: 212-221 |
| 2 | EE | Sumeet Kumar, Aneesh Aggarwal: Self-checking instructions: reducing instruction redundancy for concurrent error detection. PACT 2006: 64-73 |
| 2004 | ||
| 1 | EE | Sumeet Kumar, Prateek Pujara, Aneesh Aggarwal: Bit-Sliced Datapath for Energy-Efficient High Performance Microprocessors. PACS 2004: 30-45 |
| 1 | Aneesh Aggarwal | [1] [2] [3] [4] |
| 2 | Prateek Pujara | [1] |