| 2006 |
|---|
| 5 | EE | Chaiyasit Manovit,
Sudheendra Hangal:
Completely verifying memory consistency of test program executions.
HPCA 2006: 166-175 |
| 4 | EE | Chaiyasit Manovit,
Sudheendra Hangal,
Hassan Chafi,
Austen McDonald,
Christos Kozyrakis,
Kunle Olukotun:
Testing implementations of transactional memory.
PACT 2006: 134-143 |
| 2005 |
|---|
| 3 | EE | Chaiyasit Manovit,
Sudheendra Hangal:
Efficient algorithms for verifying memory consistency.
SPAA 2005: 245-252 |
| 2004 |
|---|
| 2 | EE | Sudheendra Hangal,
Durgam Vahia,
Chaiyasit Manovit,
Juin-Yeu Joseph Lu,
Sridhar Narayanan:
TSOtool: A Program for Verifying Memory Systems Using the Memory Consistency Model.
ISCA 2004: 114-123 |
| 1998 |
|---|
| 1 | EE | Chaiyasit Manovit,
Chatchawit Aporntewan,
Prabhas Chongstitvatana:
Synthesis of Synchronous Sequential Logic Circuits from Partial Input/Output Sequences.
ICES 1998: 98-105 |
