| |
| 2001 | ||
|---|---|---|
| 2 | EE | Yukio Mitsuyama, Zaldy Andales, Takao Onoye, Isao Shirakawa: A dynamically reconfigurable hardware-based cipher chip. ASP-DAC 2001: 11-12 |
| 1 | EE | Yukio Mitsuyama, Zaldy Andales, Takao Onoye, Isao Shirakawa: VLSI architecture of dynamically reconfigurable hardware-based cipher. ISCAS (4) 2001: 734-737 |
| 1 | Yukio Mitsuyama | [1] [2] |
| 2 | Takao Onoye | [1] [2] |
| 3 | Isao Shirakawa | [1] [2] |