| 2006 |
|---|
| 9 | EE | Takashi Harada,
Norio Masuda,
Masahiro Yamaguchi:
Near-Field Magnetic Measurements and Their Application to EMC of Digital Equipment.
IEICE Transactions 89-C(1): 9-15 (2006) |
| 2005 |
|---|
| 8 | EE | Takashi Harada,
Masafumi Yamashita:
Transversal Merge Operation: A Nondominated Coterie Construction Method for Distributed Mutual Exclusion.
IEEE Trans. Parallel Distrib. Syst. 16(2): 183-192 (2005) |
| 7 | EE | Zhi Liang Wang,
Osami Wada,
Takashi Harada,
Takahiro Yaguchi,
Yoshitaka Toyota,
Ryuji Koga:
Modeling and Simulation of Via-Connected Power Bus Stacks in Multilayer PCBs.
IEICE Transactions 88-B(8): 3176-3181 (2005) |
| 2004 |
|---|
| 6 | EE | Takashi Harada,
Masafumi Yamashita:
k-Coteries for Tolerating Network 2-Partition.
IEEE Trans. Parallel Distrib. Syst. 15(7): 666-672 (2004) |
| 2001 |
|---|
| 5 | EE | Takashi Harada,
Masafumi Yamashita:
Coterie Join Operation and Tree Structured k-Coteries.
IEEE Trans. Parallel Distrib. Syst. 12(9): 865-874 (2001) |
| 1999 |
|---|
| 4 | | Takashi Harada,
Masafumi Yamashita:
A Coterie Join Operation and Tree Structured k-Coteries.
PDPTA 1999: 327-333 |
| 3 | | Takashi Harada,
Masafumi Yamashita:
Improving the Availability of Mutual Exclusion Systems on Incomplete Networks.
IEEE Trans. Computers 48(7): 744-747 (1999) |
| 1997 |
|---|
| 2 | EE | Takashi Harada,
Masafumi Yamashita:
Nondominated Coteries on Graphs.
IEEE Trans. Parallel Distrib. Syst. 8(6): 667-672 (1997) |
| 1981 |
|---|
| 1 | | Isao Shirakawa,
Noboru Okuda,
Takashi Harada,
Sadahiro Tani,
Hiroshi Ozaki:
A Layout System for the Random Logic Portion of an MOS LSI Chip.
IEEE Trans. Computers 30(8): 572-581 (1981) |
