1996 | ||
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2 | EE | Yuji Shigehiro, Takashi Nagata, Isao Shirakawa, Itthichai Arungsrisangchai, Hiromitsu Takahashi: Automatic layout recycling based on layout description and linear programming. IEEE Trans. on CAD of Integrated Circuits and Systems 15(8): 959-967 (1996) |
1993 | ||
1 | Yuji Shigehiro, Takashi Nagata, Isao Shirakawa, Takashi Kambe: Optimal layout recycling based on graph theoretic linear programming approach. VLSI 1993: 25-34 |
1 | Itthichai Arungsrisangchai | [2] |
2 | Takashi Kambe | [1] |
3 | Takashi Nagata | [1] [2] |
4 | Isao Shirakawa | [1] [2] |
5 | Hiromitsu Takahashi | [2] |