| 2005 |
|---|
| 3 | EE | Yoshihiro Uchida,
Sadahiro Tani,
Masanori Hashimoto,
Shuji Tsukiyama,
Isao Shirakawa:
Interconnect capacitance extraction for system LCD circuits.
ACM Great Lakes Symposium on VLSI 2005: 160-163 |
| 2002 |
|---|
| 2 | EE | Sadahiro Tani,
Yoshihiro Uchida,
Makoto Furuie,
Shuji Tsukiyama,
BuYeol Lee,
S. Nishi,
Y. Kubota,
Isao Shirakawa,
S. Imai:
Parasitic capacitance modeling for multilevel interconnects.
APCCAS (1) 2002: 59-64 |
| 1981 |
|---|
| 1 | | Isao Shirakawa,
Noboru Okuda,
Takashi Harada,
Sadahiro Tani,
Hiroshi Ozaki:
A Layout System for the Random Logic Portion of an MOS LSI Chip.
IEEE Trans. Computers 30(8): 572-581 (1981) |
