Formal Methods in System Design
, Volume 5
Volume 5, Number 1/2, July 1994
Holger Busch
: Rule-Based Induction. 7-33
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John Harrison
: Constructing the Real Numbers in HOL. 35-59
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Catia M. Angelo
,
Luc J. M. Claesen
,
Hugo De Man
: Modeling Multi-rate DSP Specification Semantics for Formal Transformational Design in HOL. 61-94
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Mark Aagaard
,
Miriam Leeser
: A Methodology for Efficient Hardware Verification. 95-117
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Saraswati Kalvala
: Annotations in Formal Specifications and Proofs. 119-144
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Klaus Schneider
,
Ramayya Kumar
,
Thomas Kropf
: Accelerating Tableaux Proofs Using Compact Representations. 145-176
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Volume 5, Number 3, December 1994
Shuvra S. Bhattacharyya
,
Edward A. Lee
: Looped Schedules for Dataflow Descriptions of Multirate Signal Processing Algorithms. 183-205
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David M. Goldschlag
: Mechanically Verifying Safety and Liveness Properties of Delay Insensitive Circuits. 207-225
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Robert P. Kurshan
,
Michael Merritt
,
Ariel Orda
,
Sonia R. Sachs
: A Structural Linearization Principle for Processes. 227-244
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Radhakrishna Nagalla
,
Graham R. Hellestrand
: Signal Transition Graph Constraints for Synthesis of Hazard-Free Asynchronous Circuits with Unbounded-Gate Delays. 245-273
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Copyright ©
Sat May 16 23:59:10 2009 by
Michael Ley
(
ley@uni-trier.de
)