| 2007 |
|---|
| 10 | EE | Subarna Sinha,
Qing Su,
Linni Wen,
Frank Lee,
Charles Chiang,
Yi-Kan Cheng,
Jin-Lien Lin,
Yu-Chyi Harn:
A New Flexible Algorithm for Random Yield Improvement.
ISQED 2007: 795-800 |
| 2000 |
|---|
| 9 | EE | Yi-Kan Cheng,
David Bearden,
Kanti Suryadevara:
Application-Based, Transistor-Level Full-Chip Power Analysis for 700 MHz PowerPCTM Microprocessor.
ICCD 2000: 215-220 |
| 8 | EE | Yi-Kan Cheng,
Sung-Mo Kang:
A temperature-aware simulation environment for reliable ULSI chipdesign.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(10): 1211-1220 (2000) |
| 1999 |
|---|
| 7 | EE | Yi-Kan Cheng,
Sung-Mo Kang:
An efficient method for hot-spot identification in ULSI circuits.
ICCAD 1999: 124-127 |
| 6 | EE | Yi-Kan Cheng,
Sung-Mo Kang:
Temperature-driven power and timing analysis for CMOS ULSI circuits.
ISCAS (6) 1999: 214-217 |
| 1998 |
|---|
| 5 | EE | Yi-Kan Cheng,
Prasun Raha,
Chin-Chi Teng,
Elyse Rosenbaum,
Sung-Mo Kang:
ILLIADS-T: an electrothermal timing simulator for temperature-sensitive reliability diagnosis of CMOS VLSI chips.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(8): 668-681 (1998) |
| 1997 |
|---|
| 4 | EE | Chin-Chi Teng,
Yi-Kan Cheng,
Elyse Rosenbaum,
Sung-Mo Kang:
iTEM: a temperature-dependent electromigration reliability diagnosis tool.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(8): 882-893 (1997) |
| 1996 |
|---|
| 3 | EE | Yi-Kan Cheng,
Chin-Chi Teng,
Abhijit Dharchoudhury,
Elyse Rosenbaum,
Sung-Mo Kang:
iCET: A Complete Chip-Level Thermal Reliability Diagnosis Tool for CMOS VLSI Chips.
DAC 1996: 548-551 |
| 2 | EE | Chin-Chi Teng,
Yi-Kan Cheng,
Elyse Rosenbaum,
Sung-Mo Kang:
Hierarchical Electromigration Reliability Diagnosis for VLSI Interconnects.
DAC 1996: 752-757 |
| 1995 |
|---|
| 1 | | Yi-Kan Cheng,
Sung-Mo Kang:
Chip-Level Thermal Simulator to Predict VLSI Chip Temperature.
ISCAS 1995: 1392-1395 |
