George S. Taylor

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8EEJacques J. A. Fournier, Simon W. Moore, Huiyun Li, Robert D. Mullins, George S. Taylor: Security Evaluation of Asynchronous Circuits. CHES 2003: 137-151
7EESimon W. Moore, Ross J. Anderson, Robert D. Mullins, George S. Taylor, Jacques J. A. Fournier: Balanced self-checking asynchronous logic for smart card applications. Microprocessors and Microsystems 27(9): 421-430 (2003)
6EESimon W. Moore, Robert D. Mullins, Paul A. Cunningham, Ross J. Anderson, George S. Taylor: Improving Smart Card Security Using Self-Timed Circuits. ASYNC 2002: 211-
5EEGeorge S. Taylor, Simon W. Moore, Robert D. Mullins, Peter Robinson: Point to Point GALS Interconnect. ASYNC 2002: 69-75
4EEGeorge S. Taylor, Simon W. Moore, Steve Wilcox, Peter Robinson: An On-Chip Dynamically Recalibrated Delay Line for Embedded Self-Timed Systems. ASYNC 2000: 45-51
3EESimon W. Moore, George S. Taylor, Paul A. Cunningham, Robert D. Mullins, Peter Robinson: Self-Calibrating Clocks for Globally Asynchronous Locally Synchronous Systems. ICCD 2000: 73-
2 David A. Wood, Susan J. Eggers, Garth A. Gibson, Mark D. Hill, Joan M. Pendleton, Scott A. Ritchie, George S. Taylor, Randy H. Katz, David A. Patterson: An In-Cache Address Translation Mechanism. ISCA 1986: 358-365
1 George S. Taylor, Paul N. Hilfinger, James R. Larus, David A. Patterson, Benjamin G. Zorn: Evaluation of the SPUR Lisp Architecture. ISCA 1986: 444-452

Coauthor Index

1Ross J. Anderson [6] [7]
2Paul A. Cunningham [3] [6]
3Susan J. Eggers [2]
4Jacques J. A. Fournier [7] [8]
5Garth A. Gibson [2]
6Paul N. Hilfinger [1]
7Mark D. Hill [2]
8Randy H. Katz [2]
9James R. Larus [1]
10Huiyun Li [8]
11Simon W. Moore [3] [4] [5] [6] [7] [8]
12Robert D. Mullins [3] [5] [6] [7] [8]
13David A. Patterson [1] [2]
14Joan M. Pendleton [2]
15Scott A. Ritchie [2]
16Peter Robinson [3] [4] [5]
17Steve Wilcox [4]
18David A. Wood [2]
19Benjamin G. Zorn [1]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)