| 2003 |
|---|
| 8 | EE | Jacques J. A. Fournier,
Simon W. Moore,
Huiyun Li,
Robert D. Mullins,
George S. Taylor:
Security Evaluation of Asynchronous Circuits.
CHES 2003: 137-151 |
| 7 | EE | Simon W. Moore,
Ross J. Anderson,
Robert D. Mullins,
George S. Taylor,
Jacques J. A. Fournier:
Balanced self-checking asynchronous logic for smart card applications.
Microprocessors and Microsystems 27(9): 421-430 (2003) |
| 2002 |
|---|
| 6 | EE | Simon W. Moore,
Robert D. Mullins,
Paul A. Cunningham,
Ross J. Anderson,
George S. Taylor:
Improving Smart Card Security Using Self-Timed Circuits.
ASYNC 2002: 211- |
| 5 | EE | George S. Taylor,
Simon W. Moore,
Robert D. Mullins,
Peter Robinson:
Point to Point GALS Interconnect.
ASYNC 2002: 69-75 |
| 2000 |
|---|
| 4 | EE | George S. Taylor,
Simon W. Moore,
Steve Wilcox,
Peter Robinson:
An On-Chip Dynamically Recalibrated Delay Line for Embedded Self-Timed Systems.
ASYNC 2000: 45-51 |
| 3 | EE | Simon W. Moore,
George S. Taylor,
Paul A. Cunningham,
Robert D. Mullins,
Peter Robinson:
Self-Calibrating Clocks for Globally Asynchronous Locally Synchronous Systems.
ICCD 2000: 73- |
| 1986 |
|---|
| 2 | | David A. Wood,
Susan J. Eggers,
Garth A. Gibson,
Mark D. Hill,
Joan M. Pendleton,
Scott A. Ritchie,
George S. Taylor,
Randy H. Katz,
David A. Patterson:
An In-Cache Address Translation Mechanism.
ISCA 1986: 358-365 |
| 1 | | George S. Taylor,
Paul N. Hilfinger,
James R. Larus,
David A. Patterson,
Benjamin G. Zorn:
Evaluation of the SPUR Lisp Architecture.
ISCA 1986: 444-452 |
