| 2005 |
|---|
| 10 | EE | Jeong-Gun Lee,
Euiseok Kim,
Dong-Ik Lee:
Instruction level redundant number computations for fast data intensive processing in asynchronous processors.
Journal of Systems Architecture 51(3): 151-164 (2005) |
| 2004 |
|---|
| 9 | EE | Jeong-Gun Lee,
Euiseok Kim,
Jeong-A. Lee,
Eunok Paek:
Efficient Buffer Allocation for Asynchronous Linear Pipelines by Design Space Localization.
Asia-Pacific Computer Systems Architecture Conference 2004: 582-595 |
| 2003 |
|---|
| 8 | EE | Hiroshi Saito,
Euiseok Kim,
Nattha Sretasereekul,
Masashi Imai,
Hiroshi Nakamura,
Takashi Nanya:
Control Signal Sharing Using Data-Path Delay Information at Control Data Flow Graph Descriptions.
ASYNC 2003: 184-195 |
| 7 | EE | Euiseok Kim,
Hiroshi Saito,
Jeong-Gun Lee,
Dong-Ik Lee,
Hiroshi Nakamura,
Takashi Nanya:
Distributed Synchronous Control Units for Dataflow Graphs under Allocation of Telescopic Arithmetic Units.
DATE 2003: 10276-10281 |
| 6 | EE | Nattha Sretasereekul,
Hiroshi Saito,
Masashi Imai,
Euiseok Kim,
Metehan Özcan,
K. Thongnoo,
Hiroshi Nakamura,
Takashi Nanya:
A zero-time-overhead asynchronous four-phase controller.
ISCAS (5) 2003: 205-208 |
| 5 | EE | Hiroshi Saito,
Euiseok Kim,
Masashi Imai,
Nattha Sretasereekul,
Hiroshi Nakamura,
Takashi Nanya:
Control signal sharing of asynchronous circuits using datapath delay information.
ISCAS (5) 2003: 617-620 |
| 2001 |
|---|
| 4 | EE | Euiseok Kim,
Jeong-Gun Lee,
Dong-Ik Lee:
Building a Distributed Asynchronous Control Unit through Automatic Derivation of Hierarchically Decomposed AFSMs from a CDFG.
ARVLSI 2001: 2-15 |
| 3 | EE | Jeong-Gun Lee,
Euiseok Kim,
Dong-Ik Lee:
Imprecise data computation for high performance asynchronous processors.
ASP-DAC 2001: 261-266 |
| 2 | EE | Euiseok Kim,
Dong-Ik Lee:
A new resource constrained asynchronous scheduling method through transformation of dataflow graphs.
ISCAS (5) 2001: 41-44 |
| 2000 |
|---|
| 1 | EE | Euiseok Kim,
Jeong-Gun Lee,
Dong-Ik Lee:
Automatic Process-Oriented Control Circuit Generation for Asynchronous High-Level Synthesis.
ASYNC 2000: 104-113 |
