2009 |
48 | EE | Constantin Pistol,
Christopher Dwyer,
Alvin R. Lebeck:
Architectural implications of nanoscale integrated sensing and computing.
ASPLOS 2009: 13-24 |
2008 |
47 | EE | Alvin R. Lebeck,
Krishnendu Chakrabarty:
Introduction to DAC 2007 special section.
JETC 4(3): (2008) |
2007 |
46 | EE | Jaidev P. Patwardhan,
Chris Dwyer,
Alvin R. Lebeck:
A self-organizing defect tolerant SIMD architecture.
JETC 3(2): (2007) |
2006 |
45 | EE | Jaidev P. Patwardhan,
Vijeta Johri,
Chris Dwyer,
Alvin R. Lebeck:
A defect tolerant self-organizing nanoscale SIMD architecture.
ASPLOS 2006: 241-251 |
44 | EE | Constantin Pistol,
Alvin R. Lebeck,
Chris Dwyer:
Design automation for DNA self-assembled nanostructures.
DAC 2006: 919-924 |
43 | EE | Tong Li,
Alvin R. Lebeck,
Daniel J. Sorin:
Spin Detection Hardware for Improved Management of Multithreaded Systems.
IEEE Trans. Parallel Distrib. Syst. 17(6): 508-521 (2006) |
42 | EE | Jaidev P. Patwardhan,
Chris Dwyer,
Alvin R. Lebeck,
Daniel J. Sorin:
NANA: A nano-scale active network architecture.
JETC 2(1): 1-30 (2006) |
2005 |
41 | EE | Tong Li,
Carla Schlatter Ellis,
Alvin R. Lebeck,
Daniel J. Sorin:
Pulse: A Dynamic Deadlock Detection Mechanism Using Speculative Execution.
USENIX Annual Technical Conference, General Track 2005: 31-44 |
40 | EE | Chris Dwyer,
Alvin R. Lebeck,
Daniel J. Sorin:
Self-Assembled Architectures and the Temporal Aspects of Computing.
IEEE Computer 38(1): 56-64 (2005) |
2004 |
39 | EE | Jaidev P. Patwardhan,
Alvin R. Lebeck,
Daniel J. Sorin:
Communication breakdown: analyzing CPU usage in commercial Web workloads.
ISPASS 2004: 12-19 |
38 | EE | Mithuna Thottethodi,
Alvin R. Lebeck,
Shubhendu S. Mukherjee:
Exploiting Global Knowledge to Achieve Self-Tuned Congestion Control for k-Ary n-Cube Networks.
IEEE Trans. Parallel Distrib. Syst. 15(3): 257-272 (2004) |
37 | EE | Chia-Lin Yang,
Alvin R. Lebeck,
Hung-Wei Tseng,
Chien-Hao Lee:
Tolerating memory latency through push prefetching for pointer-intensive applications.
TACO 1(4): 445-475 (2004) |
2003 |
36 | EE | Mithuna Thottethodi,
Alvin R. Lebeck,
Shubhendu S. Mukherjee:
BLAM : A High-Performance Routing Algorithm for Virtual Cut-Through Networks.
IPDPS 2003: 45 |
35 | EE | Xiaobo Fan,
Carla Schlatter Ellis,
Alvin R. Lebeck:
The Synergy Between Power-Aware Memory Systems and Processor Voltage Scaling.
PACS 2003: 164-179 |
34 | EE | Tong Li,
Alvin R. Lebeck,
Daniel J. Sorin:
Quantifying instruction criticality for shared memory multiprocessors.
SPAA 2003: 128-137 |
33 | EE | Heng Zeng,
Carla Schlatter Ellis,
Alvin R. Lebeck,
Amin Vahdat:
Currentcy: A Unifying Abstraction for Expressing Energy Management Policies.
USENIX Annual Technical Conference, General Track 2003: 43-56 |
2002 |
32 | EE | Heng Zeng,
Carla Schlatter Ellis,
Alvin R. Lebeck,
Amin Vahdat:
ECOSystem: managing energy as a first class operating system resource.
ASPLOS 2002: 123-132 |
31 | EE | Alvin R. Lebeck,
Tong Li,
Eric Rotenberg,
Jinson Koppanalil,
Jaidev P. Patwardhan:
A Large, Fast Instruction Window for Tolerating Cache Misses.
ISCA 2002: 59-70 |
30 | EE | Chia-Lin Yang,
Alvin R. Lebeck:
A Programmable Memory Hierarchy for Prefetching Linked Data Structures.
ISHPC 2002: 160-174 |
29 | EE | Xiaobo Fan,
Carla Schlatter Ellis,
Alvin R. Lebeck:
Modeling of DRAM Power Control Policies Using Deterministic and Stochastic Petri Nets.
PACS 2002: 130-140 |
28 | EE | Siddhartha Chatterjee,
Alvin R. Lebeck,
Praveen K. Patnala,
Mithuna Thottethodi:
Recursive Array Layouts and Fast Matrix Multiplication.
IEEE Trans. Parallel Distrib. Syst. 13(11): 1105-1123 (2002) |
2001 |
27 | EE | Mithuna Thottethodi,
Alvin R. Lebeck,
Shubhendu S. Mukherjee:
Self-Tuned Congestion Control for Multiprocessor Networks.
HPCA 2001: 107- |
26 | EE | Srikanth T. Srinivasan,
Roy Dz-Ching Ju,
Alvin R. Lebeck,
Chris Wilkerson:
Locality vs. criticality.
ISCA 2001: 132-143 |
25 | EE | Xiaobo Fan,
Carla Schlatter Ellis,
Alvin R. Lebeck:
Memory controller policies for DRAM power management.
ISLPED 2001: 129-134 |
24 | | Siddhartha Chatterjee,
Erin Parker,
Philip J. Hanlon,
Alvin R. Lebeck:
Exact Analysis of the Cache Behavior of Nested Loops.
PLDI 2001: 286-297 |
23 | | Philip J. Hanlon,
Dean Chung,
Siddhartha Chatterjee,
Daniela Genius,
Alvin R. Lebeck,
Erin Parker:
The Combinatorics of Cache Misses during Matrix Multiplication.
J. Comput. Syst. Sci. 63(1): 80-126 (2001) |
2000 |
22 | EE | Amin Vahdat,
Alvin R. Lebeck,
Carla Schlatter Ellis:
Every joule is precious: the case for revisiting operating system design for energy efficiency.
ACM SIGOPS European Workshop 2000: 31-36 |
21 | EE | Alvin R. Lebeck,
Xiaobo Fan,
Heng Zeng,
Carla Schlatter Ellis:
Power Aware Page Allocation.
ASPLOS 2000: 105-116 |
20 | EE | Chia-Lin Yang,
Alvin R. Lebeck:
Push vs. pull: data movement for linked data structures.
ICS 2000: 176-186 |
19 | EE | Chia-Lin Yang,
Barton Sano,
Alvin R. Lebeck:
Exploiting Parallelism in Geometry Processing with General Purpose Processors and Floating-Point SIMD Instructions.
IEEE Trans. Computers 49(9): 934-946 (2000) |
1999 |
18 | EE | Alvin R. Lebeck,
David R. Raymond,
Chia-Lin Yang,
Mithuna Thottethodi:
Annotated Memory References: A Mechanism for Informed Cache Management.
Euro-Par 1999: 1251-1254 |
17 | EE | Siddhartha Chatterjee,
Vibhor V. Jain,
Alvin R. Lebeck,
Shyam Mundhra,
Mithuna Thottethodi:
Nonlinear array layouts for hierarchical memory systems.
International Conference on Supercomputing 1999: 444-453 |
16 | EE | Alvin R. Lebeck:
Cache conscious programming in undergraduate computer science.
SIGCSE 1999: 247-251 |
15 | EE | Siddhartha Chatterjee,
Alvin R. Lebeck,
Praveen K. Patnala,
Mithuna Thottethodi:
Recursive Array Layouts and Fast Parallel Matrix Multiplication.
SPAA 1999: 222-231 |
14 | EE | Srikanth T. Srinivasan,
Alvin R. Lebeck:
Load Latency Tolerance in Dynamically Scheduled Processors.
J. Instruction-Level Parallelism 1: (1999) |
1998 |
13 | EE | Chia-Lin Yang,
Barton Sano,
Alvin R. Lebeck:
Exploiting Instruction Level Parallelism in Geometry Processing for Three Dimensional Graphics Applications.
MICRO 1998: 14-24 |
12 | EE | Srikanth T. Srinivasan,
Alvin R. Lebeck:
Load Latency Tolerance in Dynamically Scheduled Processors.
MICRO 1998: 148-159 |
1997 |
11 | EE | Ken Yocum,
Jeffrey S. Chase,
Andrew J. Gallatin,
Alvin R. Lebeck:
Cut-Through Delivery in Trapeze: An Exercise in Low-Latency Messaging.
HPDC 1997: 243- |
10 | EE | Alvin R. Lebeck,
David A. Wood:
Active Memory: A New Abstraction for Memory System Simulation.
ACM Trans. Model. Comput. Simul. 7(1): 42-77 (1997) |
1995 |
9 | EE | Alvin R. Lebeck,
David A. Wood:
Dynamic Self-Invalidation: Reducing Coherence Overhead in Shared-Memory Multiprocessors.
ISCA 1995: 48-59 |
8 | | Alvin R. Lebeck,
David A. Wood:
Active Memory: A New Abstraction for Memory-System Simulation.
SIGMETRICS 1995: 220-231 |
1994 |
7 | | Ioannis Schoinas,
Babak Falsafi,
Alvin R. Lebeck,
Steven K. Reinhardt,
James R. Larus,
David A. Wood:
Fine-grain Access Control for Distributed Shared Memory.
ASPLOS 1994: 297-306 |
6 | EE | Babak Falsafi,
Alvin R. Lebeck,
Steven K. Reinhardt,
Ioannis Schoinas,
Mark D. Hill,
James R. Larus,
Anne Rogers,
David A. Wood:
Application-specific protocols for user-level shared memory.
SC 1994: 380-389 |
5 | | Alvin R. Lebeck,
David A. Wood:
Cache Profiling and the SPEC Benchmarks: A Case Study.
IEEE Computer 27(10): 15-26 (1994) |
4 | EE | Alvin R. Lebeck,
Gurindar S. Sohi:
Request Combining in Multiprocessors with Arbitrary Interconnection Networks.
IEEE Trans. Parallel Distrib. Syst. 5(11): 1140-1155 (1994) |
1993 |
3 | | David A. Wood,
Satish Chandra,
Babak Falsafi,
Mark D. Hill,
James R. Larus,
Alvin R. Lebeck,
James C. Lewis,
Shubhendu S. Mukherjee,
Subbarao Palacharla,
Steven K. Reinhardt:
Mechanisms for Cooperative Shared Memory.
ISCA 1993: 156-167 |
2 | | Steven K. Reinhardt,
Mark D. Hill,
James R. Larus,
Alvin R. Lebeck,
James C. Lewis,
David A. Wood:
The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers.
SIGMETRICS 1993: 48-60 |
1989 |
1 | EE | Richard E. Kessler,
Richard Jooss,
Alvin R. Lebeck,
Mark D. Hill:
Inexpensive Implementations of Set-Associativity.
ISCA 1989: 131-139 |