| 2009 |
|---|
| 10 | EE | David Dice,
Yossi Lev,
Mark Moir,
Daniel Nussbaum:
Early experience with a commercial hardware transactional memory implementation.
ASPLOS 2009: 157-168 |
| 2008 |
|---|
| 9 | EE | Mark Moir,
Kevin Moore,
Daniel Nussbaum:
The adaptive transactional memory test platform: a tool for experimenting with transactional code for rock (poster).
SPAA 2008: 362 |
| 2006 |
|---|
| 8 | EE | Peter Damron,
Alexandra Fedorova,
Yossi Lev,
Victor Luchangco,
Mark Moir,
Daniel Nussbaum:
Hybrid transactional memory.
ASPLOS 2006: 336-346 |
| 7 | EE | Victor Luchangco,
Daniel Nussbaum,
Nir Shavit:
A Hierarchical CLH Queue Lock.
Euro-Par 2006: 801-810 |
| 2005 |
|---|
| 6 | EE | Mark Moir,
Daniel Nussbaum,
Ori Shalev,
Nir Shavit:
Using elimination to implement scalable and lock-free FIFO queues.
SPAA 2005: 253-262 |
| 5 | EE | Alexandra Fedorova,
Margo I. Seltzer,
Christopher Small,
Daniel Nussbaum:
Performance of Multithreaded Chip Multiprocessors and Implications for Operating System Design.
USENIX Annual Technical Conference, General Track 2005: 395-398 |
| 2004 |
|---|
| 4 | EE | Alexandra Fedorova,
Christopher Small,
Daniel Nussbaum,
Margo I. Seltzer:
Chip multithreading systems need a new operating system scheduler.
ACM SIGOPS European Workshop 2004: 9 |
| 1992 |
|---|
| 3 | | Anant Agarwal,
Jonathan Babb,
David Chaiken,
Godfrey D'Souza,
Kirk L. Johnson,
David A. Kranz,
John Kubiatowicz,
Beng-Hong Lim,
Gino Maa,
Kenneth Mackenzie,
Daniel Nussbaum,
Mike Parkin,
Donald Yeung:
Sparcle: A Multithreaded VLSI Processor for Parallel Computing.
Parallel Symbolic Computing 1992: 359-361 |
| 1991 |
|---|
| 2 | | Daniel Nussbaum,
Anant Agarwal:
Scalability of Parallel Machines.
Commun. ACM 34(3): 57-61 (1991) |
| 1990 |
|---|
| 1 | EE | Daniel Nussbaum,
Ingmar Vuong-Adlerberg,
Anant Agarwal:
Modeling a Circuit Switched Multiprocessor Interconnect.
SIGMETRICS 1990: 267-269 |
