| 2002 |
|---|
| 4 | EE | Jin-Fu Li,
Hsin-Jung Huang,
Jeng-Bin Chen,
Chih-Pin Su,
Cheng-Wen Wu,
Chuang Cheng,
Shao-I Chen,
Chi-Yi Hwang,
Hsiao-Ping Lin:
A Hierarchical Test Scheme for System-On-Chip Designs.
DATE 2002: 486-490 |
| 3 | EE | Jin-Fu Li,
Hsin-Jung Huang,
Jeng-Bin Chen,
Chih-Pin Su,
Cheng-Wen Wu,
Chuang Cheng,
Shao-I Chen,
Chi-Yi Hwang,
Hsiao-Ping Lin:
A Hierarchical Test Methodology for Systems on Chip.
IEEE Micro 22(5): 69-81 (2002) |
| 2 | EE | Chih-Wea Wang,
Chi-Feng Wu,
Jin-Fu Li,
Cheng-Wen Wu,
Tony Teng,
Kevin Chiu,
Hsiao-Ping Lin:
A Built-in Self-Test Scheme with Diagnostics Support for Embedded SRAM.
J. Electronic Testing 18(6): 637-647 (2002) |
| 2000 |
|---|
| 1 | EE | Chih-Wea Wang,
Chi-Feng Wu,
Jin-Fu Li,
Cheng-Wen Wu,
Tony Teng,
Kevin Chiu,
Hsiao-Ping Lin:
A built-in self-test and self-diagnosis scheme for embedded SRAM.
Asian Test Symposium 2000: 45-50 |
