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Eriko Nurvitadhi

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2008
9EEEric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai: A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs. FPGA 2008: 77-86
8EEEriko Nurvitadhi, Jumnit Hong, Shih-Lien Lu: Active Cache Emulator. IEEE Trans. VLSI Syst. 16(3): 229-240 (2008)
2007
7EEEric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai: PROToFLEX: FPGA-accelerated Hybrid Functional Simulator. IPDPS 2007: 1-6
6EEEriko Nurvitadhi, Ben Lee, Chansu Yu, Myungchul Kim: Adaptive semi-soft handoff for Cellular IP networks. IJWMC 2(2/3): 109-119 (2007)
2006
5EEJumnit Hong, Eriko Nurvitadhi, Shih-Lien Lu: Design, implementation, and verification of active cache emulator (ACE). FPGA 2006: 63-72
2005
4EEEriko Nurvitadhi, Nirut Chalainanont, Shih-Lien Lu: Characterization of L3 cache behavior of SPECjAppServer2002 and TPC-C. ICS 2005: 12-20
3EEBrian T. Gold, Jangwoo Kim, Jared C. Smolens, Eric S. Chung, Vasileios Liaskovitis, Eriko Nurvitadhi, Babak Falsafi, James C. Hoe, Andreas Nowatzyk: TRUSS: A Reliable, Scalable Server Architecture. IEEE Micro 25(6): 51-59 (2005)
2EEBen Lee, Eriko Nurvitadhi, Reshma Dixit, Chansu Yu, Myungchul Kim: Dynamic voltage scaling techniques for power efficient video decoding. Journal of Systems Architecture 51(10-11): 633-652 (2005)
2003
1 Eriko Nurvitadhi, Ben Lee, Chansu Yu, Myungchul Kim: A Comparative Study of Dynamic Voltage Scaling Techniques for Low-Power Video Decoding. Embedded Systems and Applications 2003: 292-298

Coauthor Index

1Nirut Chalainanont [4]
2Eric S. Chung [3] [7] [9]
3Reshma Dixit [2]
4Babak Falsafi [3] [7] [9]
5Brian T. Gold (Brian Gold) [3]
6James C. Hoe [3] [7] [9]
7Jumnit Hong [5] [8]
8Jangwoo Kim [3]
9Myungchul Kim [1] [2] [6]
10Ben Lee [1] [2] [6]
11Vasileios Liaskovitis [3]
12Shih-Lien Lu [4] [5] [8]
13Ken Mai [7] [9]
14Andreas Nowatzyk [3]
15Jared C. Smolens [3]
16Chansu Yu [1] [2] [6]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)