2008 | ||
---|---|---|
19 | EE | Shane Santner, Wesley Peck, Jason Agron, David L. Andrews: Symmetric Multiprocessor Design for Hybrid CPU/FPGA SoCs. ARC 2008: 99-110 |
18 | EE | David L. Andrews, Ron Sass, Erik Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp: Achieving Programming Model Abstractions for Reconfigurable Computing. IEEE Trans. VLSI Syst. 16(1): 34-44 (2008) |
2007 | ||
17 | Erik Anderson, Wesley Peck, Jim Stevens, Jason Agron, Fabrice Baijot, Seth Warn, David L. Andrews: Memory Hierarchy for MCSoPC Multithreaded Systems. ERSA 2007: 44-50 | |
16 | EE | Erik Anderson, Wesley Peck, Jim Stevens, Jason Agron, Fabrice Baijot, Seth Warn, David L. Andrews: Supporting High Level Language Semantics Within Hardware Resident Threads. FPL 2007: 98-103 |
2006 | ||
15 | David L. Andrews, Ron Sass, Erik Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp: The Case for High Level Programming Models for Reconfigurable Computers. ERSA 2006: 21-32 | |
14 | EE | Erik Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp, Ron Sass, David L. Andrews: Enabling a Uniform Programming Model Across the Software/Hardware Boundary. FCCM 2006: 89-98 |
13 | EE | Wesley Peck, Erik Anderson, Jason Agron, Jim Stevens, Fabrice Baijot, David L. Andrews: Hthreads: A Computational Model for Reconfigurable Devices. FPL 2006: 1-4 |
12 | EE | Jason Agron, Wesley Peck, Erik Anderson, David L. Andrews, Ed Komp, Ron Sass, Fabrice Baijot, Jim Stevens: Run-Time Services for Hybrid CPU/FPGA Systems on Chip. RTSS 2006: 3-12 |
2005 | ||
11 | EE | Razali Jidin, David L. Andrews, Wesley Peck, Dan Chirpich, Kevin Stout, John M. Gauch: Evaluation of the Hybrid Multithreading Programming Model using Image Processing Transforms. IPDPS 2005 |
2004 | ||
10 | Razali Jidin, David L. Andrews, Douglas Niehaus: Implementing Multi Threaded System Support for Hybrid FPGA/CPU Computational Components. ERSA 2004: 116-122 | |
9 | EE | David L. Andrews, Douglas Niehaus, Peter J. Ashenden: Programming Models for Hybrid CPU/FPGA Chips. IEEE Computer 37(1): 118-120 (2004) |
8 | EE | David L. Andrews, Douglas Niehaus, Razali Jidin, Michael Finley, Wesley Peck, Michael Frisbie, Jorge L. Ortiz, Ed Komp, Peter J. Ashenden: Programming Models for Hybrid FPGA-CPU Computational Components: A Missing Link. IEEE Micro 24(4): 42-53 (2004) |
2003 | ||
7 | EE | David L. Andrews, Joe Evans, Venumadhav Mangipudi, Aditya Mandapaka: SCIMPS: An Integrated Approach to Distributed Processing in Sensor Webs. IPDPS 2003: 111 |
6 | EE | David L. Andrews, Douglas Niehaus: Architectural Frameworks for MPP Systems on a Chip. IPDPS 2003: 265 |
5 | EE | Douglas Niehaus, David L. Andrews: Using the Multi-Threaded Computation Model as a Unifying Framework for Hardware-Software Co-Design and Implementation. WORDS Fall 2003: 317-324 |
2002 | ||
4 | EE | David L. Andrews, Lonnie R. Welch, David M. Chelberg, Scott A. Brandt: A Framework for Using Benefit Functions In Complex Real Time Systems. IPDPS 2002 |
3 | EE | David L. Andrews, Paul Austin, Peter Costello, David LeVan: Interprocess communications in the AN/BSY-2 distributed computer system: a case study. Journal of Systems and Software 61(3): 233-242 (2002) |
1997 | ||
2 | William H. Mangione-Smith, Brad Hutchins, David L. Andrews, André DeHon, Carl Ebeling, Reiner W. Hartenstein, Oskar Mencer, John Morris, Krishna V. Palem, Viktor K. Prasanna, Henk A. E. Spaanenburg: Seeking Solutions in Configurable Computing. IEEE Computer 30(12): 38-43 (1997) | |
1991 | ||
1 | Daniel Pease, Arif Ghafoor, Ishfaq Ahmad, David L. Andrews, Kamal Foudil-Bey, Thomas E. Karpinski, Mohammad A. Mikki, Mohamed Zerrouki: PAWS: A Performance Evaluation Tool for Parallel Computing Systems. IEEE Computer 24(1): 18-29 (1991) |