Thambipillai Srikanthan, Jingling Xue, Chip-Hong Chang (Eds.):
Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, ACSAC 2005, Singapore, October 24-26, 2005, Proceedings.
Lecture Notes in Computer Science 3740 Springer 2005, ISBN 3-540-29643-3 BibTeX
Keynote Address I
Energy Efficient and Power Aware Techniques
Methodologies and Architectures for Application-Specific Systems
- Ming Z. Zhang, Hau T. Ngo, Vijayan K. Asari:
Design of an Efficient Multiplier-Less Architecture for Multi-dimensional Convolution.
65-78
Electronic Edition (link) BibTeX
- Su-Jin Lee, Cheong-Ghil Kim, Shin-Dug Kim:
A Pipelined Hardware Architecture for Motion Estimation of H.264/AVC.
79-89
Electronic Edition (link) BibTeX
- Siti Yuhaniz, Tanya Vladimirova, Martin Sweeting:
Embedded Intelligent Imaging On-Board Small Satellites.
90-103
Electronic Edition (link) BibTeX
- Jongmyon Kim, D. Scott Wills, Linda M. Wills:
Architectural Enhancements for Color Image and Video Processing on Embedded Systems.
104-117
Electronic Edition (link) BibTeX
- Yufeng Zhang, Yi Zhou, Jianhua Chen, Xinling Shi, Zhenyu Guo:
A Portable Doppler Device Based on a DSP with High- Performance Spectral Estimation and Output.
118-130
Electronic Edition (link) BibTeX
Processor Architectures and Microarchitectures
High-Reliability and Fault-Tolerant Architectures
Compiler and OS for Emerging Architectures
- Canqun Yang, Xuejun Yang, Jingling Xue:
Improving the Performance of GCC by Exploiting IA-64 Architectural Features.
236-251
Electronic Edition (link) BibTeX
- Pramod Ramarao, Akhilesh Tyagi:
An Integrated Partitioning and Scheduling Based Branch Decoupling.
252-268
Electronic Edition (link) BibTeX
- Feng Zhou, Junchao Zhang, Chengyong Wu, Zhaoqing Zhang:
A Register Allocation Framework for Banked Register Files with Access Constraints.
269-280
Electronic Edition (link) BibTeX
- Flavius Gruian, Zoran A. Salcic:
Designing a Concurrent Hardware Garbage Collector for Small Embedded Systems.
281-294
Electronic Edition (link) BibTeX
- Chang Yu, Ching-Hsien Hsu, Kun-Ming Yu, Chiu-Kuo Liang, Chun-I Chen:
Irregular Redistribution Scheduling by Partitioning Messages.
295-309
Electronic Edition (link) BibTeX
Data Value Predictions
Keynote Address II
Reconfigurable Computing Systems and Polymorphic Architectures
- K. S. Tham, Douglas L. Maskell:
Software-Oriented System-Level Simulation for Design Space Exploration of Reconfigurable Architectures.
391-404
Electronic Edition (link) BibTeX
- Jiho Chang, JongSu Yi, JunSeong Kim:
A Switch Wrapper Design for SNA On-Chip-Network.
405-414
Electronic Edition (link) BibTeX
- Marco Torre, Usama Malik, Oliver Diessel:
A Configuration System Architecture Supporting Bit-Stream Compression for FPGAs.
415-428
Electronic Edition (link) BibTeX
- Jacop Yanto, Timothy F. Oliver, Bertil Schmidt, Douglas L. Maskell:
Biological Sequence Analysis with Hidden Markov Models on an FPGA.
429-439
Electronic Edition (link) BibTeX
- P. C. Kwan, C. T. Clarke:
FPGAs for Improved Energy Efficiency in Processor Based Systems.
440-449
Electronic Edition (link) BibTeX
- Siew Kei Lam, Deng Yun, Thambipillai Srikanthan:
Morphable Structures for Reconfigurable Instruction Set Processors.
450-463
Electronic Edition (link) BibTeX
Interconnect Networks and Network Interfaces
- Hankook Jang, Sang-Hwa Chung, Soo-Cheol Oh:
Implementation of a Hybrid TCP/IP Offload Engine Prototype.
464-477
Electronic Edition (link) BibTeX
- Hyeong-Ok Lee, Jong-Seok Kim, Kyoung-Wook Park, Jeonghyun Seo, Eunseuk Oh:
Matrix-Star Graphs: A New Interconnection Network Based on Matrix Operations.
478-487
Electronic Edition (link) BibTeX
- Fang'ai Liu, Xinhua Wang, Liancheng Xu:
The Channel Assignment Algorithm on RP(k) Networks.
488-498
Electronic Edition (link) BibTeX
- Tingrong Lu, Chengcheng Sui, Yushu Ma, Jinsong Zhao, Yongtian Yang:
Extending Address Space of IP Networks with Hierarchical Addressing.
499-508
Electronic Edition (link) BibTeX
- Navid Imani, Hamid Sarbazi-Azad:
The Star-Pyramid Graph: An Attractive Alternative to the Pyramid.
509-519
Electronic Edition (link) BibTeX
- Huaxi Gu, Zengji Liu, Jungang Yang, Zhiliang Qiu, Guochang Kang:
Building a Terabit Router with XD Networks.
520-528
Electronic Edition (link) BibTeX
Parallel Architectures and Computation Models
Hardware-Software Partitioning,
Verification,
and Testing of Complex Architectures
Architectures for Secured Computing
Simulation and Performance Evaluation
Architectures for Emerging Technologies and Applications I
Memory Systems Hierarchy and Management
Architectures for Emerging Technologies and Applications II
Copyright © Sat May 16 22:58:19 2009
by Michael Ley (ley@uni-trier.de)
