2008 |
49 | EE | Soong Hyun Shin,
Sung Woo Chung,
Eui-Young Chung,
Chu Shik Jhon:
Adopting the Drowsy Technique for Instruction Caches: A Soft Error Perspective.
IEICE Transactions 91-A(7): 1772-1779 (2008) |
2007 |
48 | EE | Jong Wook Kwak,
Chu Shik Jhon:
Dynamic per-branch history length adjustment to improve branch prediction accuracy.
Microprocessors and Microsystems 31(1): 63-76 (2007) |
47 | EE | Jong Wook Kwak,
Chu Shik Jhon:
Torus Ring: improving performance of interconnection network by modifying hierarchical ring.
Parallel Computing 33(1): 2-20 (2007) |
2006 |
46 | EE | Soong Hyun Shin,
Sung Woo Chung,
Chu Shik Jhon:
On the Reliability of Drowsy Instruction Caches.
Asia-Pacific Computer Systems Architecture Conference 2006: 445-451 |
45 | EE | Jong Wook Kwak,
Seong Tae Jhang,
Chu Shik Jhon:
History Length Adjustable gshare Predictor for High-Performance Embedded Processor.
ICCSA (4) 2006: 631-638 |
44 | EE | Jong Wook Kwak,
Chu Shik Jhon:
Recovery Logics for Speculative Update Global and Local Branch History.
ISCIS 2006: 258-266 |
43 | EE | Jong Wook Kwak,
Seong Tae Jhang,
Chu Shik Jhon:
Accuracy Enhancement by Selective Use of Branch History in Embedded Processor.
International Conference on Computational Science (4) 2006: 979-986 |
42 | EE | Cheol Hong Kim,
Sung Woo Chung,
Chu Shik Jhon:
An Energy-Efficient Partitioned Instruction Cache Architecture for Embedded Processors.
IEICE Transactions 89-D(4): 1450-1458 (2006) |
41 | EE | Hyo Jin Choi,
Jinhwan Jeon,
Taehyoun Kim,
Hyo-Joong Suh,
Chu Shik Jhon:
Robust Delay Control for Audio Streaming over Wireless Link.
IEICE Transactions 89-D(8): 2448-2451 (2006) |
40 | EE | Jong Wook Kwak,
Cheol Hong Kim,
Sung-Hoon Shim,
Chu Shik Jhon:
Advanced High-Level Cache Management by Processor Access Information.
J. Inf. Sci. Eng. 22(1): 215-227 (2006) |
39 | EE | Jong Wook Kwak,
Chu Shik Jhon:
Adaptive Multi-Grain Remote Access Cache in Ring Based NUMA System.
J. Inf. Sci. Eng. 22(6): 1543-1554 (2006) |
38 | EE | Cheol Hong Kim,
Sung Woo Chung,
Chu Shik Jhon:
PP-cache: A partitioned power-aware instruction cache architecture.
Microprocessors and Microsystems 30(5): 268-279 (2006) |
2005 |
37 | EE | Cheol Kim,
Sung Chung,
Chu Shik Jhon:
An Innovative Instruction Cache for Embedded Processors.
Asia-Pacific Computer Systems Architecture Conference 2005: 41-51 |
36 | EE | Soong Hyun Shin,
Cheol Hong Kim,
Chu Shik Jhon:
An Effective Instruction Cache Prefetch Policy by Exploiting Cache History Information.
EUC 2005: 57-66 |
35 | EE | Cheol Hong Kim,
Sung-Hoon Shim,
Jong Wook Kwak,
Sung Woo Chung,
Chu Shik Jhon:
First-Level Instruction Cache Design for Reducing Dynamic Energy Consumption.
SAMOS 2005: 103-111 |
34 | EE | Sung-Hoon Shim,
Jong Wook Kwak,
Cheol Hong Kim,
Sung Tae Jhang,
Chu Shik Jhon:
Power-Aware Branch Logic: A Hardware Based Technique for Filtering Access to Branch Logic.
SAMOS 2005: 162-171 |
33 | EE | Sung-Joon Park,
Myoung-Wan Koo,
Chu Shik Jhon:
Context-Dependent Phoneme Duration Modeling with Tree-Based State Tying.
IEICE Transactions 88-D(3): 662-666 (2005) |
32 | EE | Jong Wook Kwak,
Hyong Jin Ban,
Chu Shik Jhon:
Torus Ring: Improving Interconnection Network Performance by Modifying Hierarchical Ring.
IEICE Transactions 88-D(5): 1067-1071 (2005) |
31 | EE | Jong Wook Kwak,
Ju-Hwan Kim,
Chu Shik Jhon:
The Impact of Branch Direction History Combined with Global Branch History in Branch Prediction.
IEICE Transactions 88-D(7): 1754-1758 (2005) |
30 | EE | Cheol Kim,
Sung Chung,
Chu Shik Jhon:
A Power-Aware Branch Predictor by Accessing the BTB Selectively.
J. Comput. Sci. Technol. 20(5): 607-614 (2005) |
29 | EE | Sung Woo Chung,
Hyong-Shik Kim,
Chu Shik Jhon:
A Split L2 Data Cache for Scalable Cc-numa Multiprocessors.
Journal of Circuits, Systems, and Computers 14(3): 605-618 (2005) |
28 | EE | Sung Woo Chung,
Hyong-Shik Kim,
Chu Shik Jhon:
Distance-aware L2 cache organizations for scalable multiprocessor systems.
Journal of Systems Architecture 51(6-7): 368-381 (2005) |
2004 |
27 | EE | Cheol Hong Kim,
Jong Wook Kwak,
Seong Tae Jhang,
Chu Shik Jhon:
Adaptive Block Management for Victim Cache by Exploiting L1 Cache History Information.
EUC 2004: 1-11 |
26 | EE | Sung-Hoon Shim,
Cheol Hong Kim,
Jong Wook Kwak,
Chu Shik Jhon:
Hybrid Technique for Reducing Energy Consumption in High Performance Embedded Processor.
EUC 2004: 74-84 |
25 | | Soong Hyun Shin,
Jong Wook Kwak,
Chu Shik Jhon:
Ownership-Lacking Line First Policy of Remote Access Cache in NUMA System.
PDPTA 2004: 1319-1323 |
24 | | Cheol Hong Kim,
Sung-Hoon Shim,
Jong Wook Kwak,
Chu Shik Jhon:
A Novel Approach to Improve Cache Performance in Ring-Based Multiprocessors.
PDPTA 2004: 519-524 |
23 | | Jong Wook Kwak,
Hyunbae Lee,
Cheol Hong Kim,
Sung-Hoon Shim,
Chu Shik Jhon:
Level 1 & Victim Cache Management with Processor Reuse Information.
PDPTA 2004: 694-698 |
2003 |
22 | EE | Sung Woo Chung,
Hyong-Shik Kim,
Chu Shik Jhon:
Distance-aware L2 Cache Organizations for Scalable Multiprocessor Systems.
DSD 2003: 24-32 |
2002 |
21 | | Sung Woo Chung,
Chu Shik Jhon,
Hyong-Shik Kim:
An Effective L2 Cache Replacement Policy to Distribute the Bus Traffic in the SMP Node.
IASTED PDCS 2002: 782-787 |
20 | EE | Joo Beom Yun,
Seong Tae Jhang,
Chu Shik Jhon,
Cheol Won Lee:
Analysis of System Performance by Changing the Ring Architecture on the Dual Ring CC-NUMA System.
ICPADS 2002: 103- |
19 | EE | Sung Woo Chung,
Jeong-Heon Shin,
Hyong-Shik Kim,
Chu Shik Jhon:
A Second-Level Cache With the Distance-Aware Replacement Policy for NUMA Systems.
J. Inf. Sci. Eng. 18(5): 803-813 (2002) |
2001 |
18 | | Sung Woo Chung,
Hyong-Shik Kim,
Chu Shik Jhon:
Accelerating the Continuous Data in a SCI-Based Multimedia System.
ICPADS 2001: 171-178 |
17 | EE | Byoung Soon Jang,
Sung Woo Chung,
Seong Tae Jhang,
Chu Shik Jhon:
Efficient schemes to scale the interconnection network bandwidth in a ring-based multiprocessor system.
SAC 2001: 510-516 |
2000 |
16 | | Sung Woo Chung,
Seong Tae Jhang,
Chu Shik Jhon:
Analysis of slotted ring network in real-time systems.
Computers and Their Applications 2000: 5-8 |
15 | EE | Hyo Jin Choi,
Hyo-Joong Suh,
Seong Tae Jhang,
Chu Shik Jhon:
A Method for an Integrated Simulation Linked with Scheduling Policies on a Program-Driven Simulator.
MASCOTS 2000: 134-141 |
14 | | Chul Hong Kim,
Seong Tae Jhang,
Chu Shik Jhon:
Alternatives to Enhance the Performance of Disk I/O in Ring-Based Multiprocessors.
PDPTA 2000 |
13 | EE | Jae Bum Lee,
Chu Shik Jhon:
Improving the Execution Efficiency of Barrier Synchronization in Software DSM Through Static Analysis.
International Journal of High Speed Computing 11(3): 167-188 (2000) |
1999 |
12 | | Sung Woo Chung,
Chu Shik Jhon:
Optimal Interconnection Network Bandwidth for Ring-Based Multiprocessor Systems.
PDPTA 1999: 2266-2271 |
1998 |
11 | EE | Sung Woo Chung,
Seong Tae Jhang,
Chu Shik Jhon:
PANDA: Ring-Based Multiprocessor System Using New Snooping Protocol.
ICPADS 1998: 10-17 |
10 | EE | Jin-Soo Kim,
Soonhoi Ha,
Chu Shik Jhon:
Efficient Barrier Synchronization Mechanism for BSP Model on Message Passing Architectures.
IPPS/SPDP 1998: 255-259 |
9 | EE | Jin-Soo Kim,
Soonhoi Ha,
Chu Shik Jhon:
Relaxed Barrier Synchronization for the BSP Model of Computation on Message-Passing Architectures.
Inf. Process. Lett. 66(5): 247-253 (1998) |
1997 |
8 | EE | Jae Bum Lee,
Chu Shik Jhon:
Hardware Support for Release Consistency with Queue-based Synchronization.
ICPADS 1997: 144- |
7 | EE | Hyong-Shik Kim,
Soonhoi Ha,
Chu Shik Jhon:
Quantitative Analysis on Caching Effect of I-Structure Data in Frame-Based Multithreaded Processing.
ICPP 1997: 122- |
6 | EE | Jin-Soo Kim,
Soonhoi Ha,
Chu Shik Jhon:
Reducing Overheads of Local Communications in Fine-grain Parallel Computation.
ICPP 1997: 223-226 |
1996 |
5 | | Kang Yi,
Chu Shik Jhon:
A New FPGA Technology Mapping Approach by Cluster Merging.
FPL 1996: 366-370 |
4 | EE | Kyoung-Son Jhang,
Soonhoi Ha,
Chu Shik Jhon:
COP: a Crosstalk OPtimizer for gridded channel routing.
IEEE Trans. on CAD of Integrated Circuits and Systems 15(4): 424-429 (1996) |
1995 |
3 | | Sung Tae Jung,
Eun Sei Park,
Jung Sik Kim,
Chu Shik Jhon:
Automatic Synthesis of Gate-Level Speed-Independent Control Circuits from Signal Transition Graphs.
ISCAS 1995: 1211-1214 |
1994 |
2 | | Sung Tae Jung,
Chu Shik Jhon:
Direct Synthesis of Efficient Speed-Independent Circuits from Deterministic Signal Transition Graphs.
ISCAS 1994: 307-310 |
1992 |
1 | | Myuhng Joo Kim,
Chu Shik Jhon,
Tetsuo Ida:
G-system: A Functionally-Based Communication System Model for Parallel Processing.
IFIP Congress (1) 1992: 170-178 |