Oliver Diessel

2008
22	EE	Shannon Koh, Oliver Diessel: The Effectiveness of Configuration Merging in Point-to-Point Networks for Module-based FPGA Reconfiguration. FCCM 2008: 65-76
2007
21	EE	Shannon Koh, Oliver Diessel: Module Graph Merging and Placement to Reduce Reconfiguration Overheads in Paged FPGA Devices. FPL 2007: 293-298
2006
20		Shannon Koh, Oliver Diessel: COMMA: A Communications Methodology for Dynamic Module-based Reconfiguration of FPGAs. ARCS Workshops 2006: 173-182
19	EE	Lih Wen Koh, Oliver Diessel: Functional Unit Chaining: A Runtime Adaptive Architecture for Reducing Bypass Delays. Asia-Pacific Computer Systems Architecture Conference 2006: 161-174
18	EE	Oliver Diessel, Shannon Koh: Enabling RTR for industry. Dynamically Reconfigurable Architectures 2006
17	EE	Shannon Koh, Oliver Diessel: COMMA: A Communications Methodology for Dynamic Module Reconfiguration in FPGAs. FCCM 2006: 273-274
16	EE	Usama Malik, Oliver Diessel: The Entropy of FPGA Reconfiguration. FPL 2006: 1-6
2005
15	EE	Marco Torre, Usama Malik, Oliver Diessel: A Configuration System Architecture Supporting Bit-Stream Compression for FPGAs. Asia-Pacific Computer Systems Architecture Conference 2005: 415-428
14		Usama Malik, Oliver Diessel: A Configuration Memory Architecture for Fast Run-Time-Reconfiguration of FPGAs. FPL 2005: 636-639
2004
13	EE	Bernd Scheuermann, Keith So, Michael Guntsch, Martin Middendorf, Oliver Diessel, Hossam A. ElGindy, Hartmut Schmeck: FPGA implementation of population-based ant colony optimization. Appl. Soft Comput. 4(3): 303-322 (2004)
2002
12	EE	Oliver Diessel, Usama Malik, Keith So: Towards High-Level Specification, Synthesis, and Virtualization of Programmable Logic Designs (Research Note). Euro-Par 2002: 314-318
11	EE	Oliver Diessel, Usama Malik: An FPGA Interpreter with Virtual Hardware Management. IPDPS 2002
2001
10	EE	Gordon J. Brebner, Oliver Diessel: Chip-Based Reconfigurable Task Management. FPL 2001: 182-191
9		Oliver Diessel, Hossam A. ElGindy: On Dynamic Task Scheduling for EPGA-Based Systems. Int. J. Found. Comput. Sci. 12(5): 645-669 (2001)
2000
8	EE	Oliver Diessel, George J. Milne: Behavioural Language Compilation with Virtual Hardware Management. FPL 2000: 707-717
7	EE	Hossam A. ElGindy, Viktor K. Prasanna, Hartmut Schmeck, Oliver Diessel: Configurable Architectures Workshop (RAW 2000). IPDPS Workshops 2000: 870-872
6	EE	Oliver Diessel, George J. Milne: Compiling Process Algebraic Descriptions into Reconfigurable Logic. IPDPS Workshops 2000: 916-923
1999
5		Oliver Diessel, David A. Kearney, Grant B. Wigley: A Web-Based Multiuser Operating System for Reconfiguarble Computing. IPPS/SPDP Workshops 1999: 579-587
1998
4	EE	Oliver Diessel, Hossam A. ElGindy: Partial FPGA Rearrangement by Local Repacking (Abstract). FPGA 1998: 259
3		Oliver Diessel, Hossam A. ElGindy: Partial Rearrangements of Space-Shared FPGAs. IPPS/SPDP Workshops 1998: 913-918
1997
2		Oliver Diessel, Hossam A. ElGindy: Run-time compaction of FPGA designs. FPL 1997: 131-140
1996
1		Bryan Beresford-Smith, Oliver Diessel, Hossam A. ElGindy: Optimal Algorithms for Constrained Reconfigurable Meshes. J. Parallel Distrib. Comput. 39(1): 74-78 (1996)

Coauthor Index

1	Bryan Beresford-Smith	[1]
2	Gordon J. Brebner	[10]
3	Hossam A. ElGindy	[1] [2] [3] [4] [7] [9] [13]
4	Michael Guntsch	[13]
5	David A. Kearney	[5]
6	Lih Wen Koh	[19]
7	Shannon Koh	[17] [18] [20] [21] [22]
8	Usama Malik	[11] [12] [14] [15] [16]
9	Martin Middendorf	[13]
10	George J. Milne	[6] [8]
11	Viktor K. Prasanna (V. K. Prasanna Kumar)	[7]
12	Bernd Scheuermann	[13]
13	Hartmut Schmeck	[7] [13]
14	Keith So	[12] [13]
15	Marco Torre	[15]
16	Grant B. Wigley	[5]

Colors in the list of coauthors