2007 |
6 | | Biju K. Raveendran,
T. S. B. Sudarshan,
Avinash Patil,
Komal B. Randive,
S. Gurunarayanan:
An Energy Efficient Selective Placement Scheme for Set-Associative Data Cache in Embedded System.
ESA 2007: 188-196 |
5 | EE | T. S. Ganesh,
Michael T. Frederick,
T. S. B. Sudarshan,
Arun K. Somani:
Hashchip: A shared-resource multi-hash function processor architecture on FPGA.
Integration 40(1): 11-19 (2007) |
2005 |
4 | EE | T. S. B. Sudarshan,
Rahil Mir,
S. Vijayalakshmi:
DRIL- A Flexible Architecture for Blowfish Encryption Using Dynamic Reconfiguration, Replication, Inner-Loop Pipelining, Loop Folding Techniques.
Asia-Pacific Computer Systems Architecture Conference 2005: 625-639 |
3 | | T. S. B. Sudarshan,
T. S. Ganesh,
G. Raghurama:
Caching and replacement of streaming objects based on a popularity function.
Communications and Computer Networks 2005: 208-212 |
2 | | T. S. B. Sudarshan,
P. M. Pavankiran,
Swetha Krishnan,
G. Raghurama:
Fuzzy Logic Approach for Replacement Policy in Web Caching.
IICAI 2005: 2308-2319 |
1 | EE | T. S. Ganesh,
T. S. B. Sudarshan:
ASIC Implementation of a Unified Hardware Architecture for Non-Key Based Cryptographic Hash Primitives.
ITCC (1) 2005: 580-585 |