| |
| 2005 | ||
|---|---|---|
| 7 | EE | You-Jan Tsai, Jong-Jiann Shieh: Speculative Issue Logic. Asia-Pacific Computer Systems Architecture Conference 2005: 323-335 |
| 2004 | ||
| 6 | EE | Tzung-Rei Yang, Jong-Jiann Shieh: Dynamic Fetch Engine for Simultaneous Multithreaded Processors. Asia-Pacific Computer Systems Architecture Conference 2004: 489-502 |
| 2003 | ||
| 5 | Feng-Jiann Shiao, Jong-Jiann Shieh: An Issue Logic for Superscalar Microprocessors. CAINE 2003: 268-271 | |
| 2002 | ||
| 4 | Zheng-Kuo Wu, Jong-Jiann Shieh: Block Based Fetch Engine for Superscalar Processors. CAINE 2002: 201-204 | |
| 2001 | ||
| 3 | Yung-Chung Wu, Jong-Jiann Shieh: A Multiple Blocks Fetch Engine for High Performance Superscalar Processors. ISCA PDCS 2001: 339-344 | |
| 1990 | ||
| 2 | EE | Jong-Jiann Shieh, Christos A. Papachristou: An instruction reoderer for pipelined computers. MICRO 1990: 135-142 |
| 1989 | ||
| 1 | EE | Jong-Jiann Shieh, Christos A. Papachristou: On reordering instruction streams for pipelined computers. MICRO 1989: 199-206 |
| 1 | Christos A. Papachristou | [1] [2] |
| 2 | Feng-Jiann Shiao | [5] |
| 3 | You-Jan Tsai | [7] |
| 4 | Yung-Chung Wu | [3] |
| 5 | Zheng-Kuo Wu | [4] |
| 6 | Tzung-Rei Yang | [6] |