2008 |
31 | EE | Abhijit Ray,
Wu Jigang,
Thambipillai Srikanthan:
Performance Estimation: IPC.
ICYCS 2008: 189-193 |
30 | EE | Wu Jigang,
Thambipillai Srikanthan,
Kai Wang:
Finding minimum interconnect sub-arrays in reconfigurable VLSI arrays.
ISCAS 2008: 1352-1355 |
29 | EE | Xiongfei Liao,
Wu Jigang,
Thambipillai Srikanthan:
A temperature-aware virtual submesh allocation scheme for noc-based manycore chips.
SPAA 2008: 182-184 |
2007 |
28 | EE | Xiongfei Liao,
Wu Jigang,
Thambipillai Srikanthan:
Temperature-Aware Submesh Allocation Scheme for Heat Balancing on Chip-Multiprocessors.
ASAP 2007: 228-233 |
27 | EE | Wu Jigang,
Thambipillai Srikanthan,
Guang Chen:
One-dimensional Search Algorithms for Hardware/Software Partitioning.
MEMOCODE 2007: 149-158 |
26 | EE | Wu Jigang,
Thambipillai Srikanthan,
Xiaodong Wang:
Integrated Row and Column Rerouting for Reconfiguration of VLSI Arrays with Four-Port Switches.
IEEE Trans. Computers 56(10): 1387-1400 (2007) |
2006 |
25 | EE | Wu Jigang,
Thambipillai Srikanthan,
Xiaodong Wang:
New Reconfiguration Algorithm for Degradable VLSI Arrays.
APCCAS 2006: 1152-1155 |
24 | EE | Wu Jigang,
Thambipillai Srikanthan:
Efficient Algorithms for Hardware/Software Partitioning to Minimize Hardware Area.
APCCAS 2006: 1875-1878 |
23 | EE | Leipo Yan,
Siew Kei Lam,
Thambipillai Srikanthan,
Wu Jigang:
Energy Efficient Cache Tuning with Performance Bound.
DELTA 2006: 97-100 |
22 | EE | Wu Jigang,
Thambipillai Srikanthan:
Reconfiguration Algorithms for Power Efficient VLSI Subarrays with Four-Port Switches.
IEEE Trans. Computers 55(3): 243-253 (2006) |
21 | EE | Wu Jigang,
Thambipillai Srikanthan:
Low-complex dynamic programming algorithm for hardware/software partitioning.
Inf. Process. Lett. 98(2): 41-46 (2006) |
20 | EE | Wu Jigang,
Thambipillai Srikanthan:
An efficient algorithm for the collapsing knapsack problem.
Inf. Sci. 176(12): 1739-1751 (2006) |
19 | EE | Wu Jigang,
Thambipillai Srikanthan:
Algorithmic aspects of area-efficient hardware/software partitioning.
The Journal of Supercomputing 38(3): 223-235 (2006) |
2005 |
18 | EE | Wu Jigang,
Thambipillai Srikanthan,
Chengbin Yan:
Minimizing Power in Hardware/Software Partitioning.
Asia-Pacific Computer Systems Architecture Conference 2005: 580-588 |
17 | EE | Wu Jigang,
Thambipillai Srikanthan,
Heiko Schröder:
Efficient Techniques and Hardware Analysis for Mesh-Connected Processors.
ICA3PP 2005: 442-446 |
16 | EE | Abhijit Ray,
Thambipillai Srikanthan,
Wu Jigang:
Practical Techniques for Performance Estimation of Processors.
IWSOC 2005: 308-311 |
15 | EE | Wu Jigang,
Thambipillai Srikanthan,
Heiko Schröder:
Efficient reconfigurable techniques for VLSI arrays with 6-port switches.
IEEE Trans. VLSI Syst. 13(8): 976-979 (2005) |
14 | EE | Wu Jigang,
Thambipillai Srikanthan:
Power Efficient Sub-Array in Reconfigurable VLSI Meshes.
J. Comput. Sci. Technol. 20(5): 647-653 (2005) |
2004 |
13 | EE | Wu Jigang,
Thambipillai Srikanthan:
Finding High Performance Solution in Reconfigurable Mesh-Connected VLSI Arrays.
Asia-Pacific Computer Systems Architecture Conference 2004: 440-448 |
12 | | Wu Jigang,
Thambipillai Srikanthan:
Fast reconfiguring mesh-connected VLSI arrays.
ISCAS (2) 2004: 949-952 |
11 | EE | Abhijit Ray,
Wu Jigang,
Thambipillai Srikanthan:
Knapsack Model and Algorithm for HW/SW Partitioning Problem.
International Conference on Computational Science 2004: 200-205 |
10 | | Abhijit Ray,
Wu Jigang,
Thambipillai Srikanthan:
Knapsack Model and Algorithm for Hardware/Software Partitioning Problem.
Computers and Artificial Intelligence 23(5): (2004) |
9 | EE | Wu Jigang,
Thambipillai Srikanthan:
An efficient data structure for branch-and-bound algorithm.
Inf. Sci. 167(1-4): 233-237 (2004) |
2003 |
8 | | Wu Jigang,
Thambipillai Srikanthan,
Chandni R. Patel:
A Low Power Algorithm for Reconfigurable VLSI/WSI Arrays.
Embedded Systems and Applications 2003: 237-242 |
7 | EE | Wu Jigang,
Thambipillai Srikanthan:
Partial rerouting algorithm for reconfigurable VLSI arrays.
ISCAS (5) 2003: 641-644 |
6 | EE | Wu Jigang,
Thambipillai Srikanthan:
On the Reconfiguration Algorithm for Fault-Tolerant VLSI Arrays.
International Conference on Computational Science 2003: 360-366 |
5 | EE | Wu Jigang,
Thambipillai Srikanthan:
A Run-time Reconfiguration Algorithm for VLSI Arrays.
VLSI Design 2003: 567-572 |
4 | EE | Wu Jigang,
Thambipillai Srikanthan:
An improved reconfiguration algorithm for degradable VLSI/WSI arrays.
Journal of Systems Architecture 49(1-2): 23-31 (2003) |
2002 |
3 | EE | Wu Jigang,
Heiko Schröder,
Thambipillai Srikanthan:
New Architecture and Algorithms for Degradable VLSI/WSI Arrays.
COCOON 2002: 181-190 |
2001 |
2 | | Wu Jigang,
Lei Yunfei,
Heiko Schröder:
A Minimal Reduction Approach for the Collapsing Knapsack Problem.
Computers and Artificial Intelligence 20(4): (2001) |
2000 |
1 | EE | Wu Jigang,
Yongchang Ji,
Guoliang Chen:
An Optimal Online Algorithm for Halfplane Intersection.
J. Comput. Sci. Technol. 15(3): 295-299 (2000) |