Volume 49,
Numbers 1-2,
July 2003
Volume 49,
Number 3,
August 2003
Parallel,
Distributed and Network-based Processing - selected papers from the 10th Euromicro Workshop
Volume 49,
Numbers 4-6,
September 2003
Reconfigurable Systems
- Martyn Edwards, Lech Józwiak:
Special-issue on reconfigurable systems.
123-125
Electronic Edition (link) BibTeX
- Jürgen Becker, Reiner W. Hartenstein:
Configware and morphware going mainstream.
127-142
Electronic Edition (link) BibTeX
- Christophe Wolinski, Maya Gokhale, Kevin McCabe:
Polymorphous fabric-based systems: Model, tools, applications.
143-154
Electronic Edition (link) BibTeX
- Kostas Masselos, Antti Pelkonen, Miroslav Cupák, Spyros Blionas:
Realization of wireless multimedia communication systems on reconfigurable platforms.
155-175
Electronic Edition (link) BibTeX
- Simon Leung, Adam Postula:
Functionally partitioned module-based programmable architecture for wireless base-band processing.
177-192
Electronic Edition (link) BibTeX
- Domingo Benitez:
Performance of reconfigurable architectures for image-processing applications.
193-210
Electronic Edition (link) BibTeX
- Iouliia Skliarova, António de Brito Ferrari:
The design and implementation of a reconfigurable processor for problems of combinatorial computation.
211-226
Electronic Edition (link) BibTeX
- Lech Józwiak, Aleksander Slusarczyk, Artur Chojnacki:
Fast and compact sequential circuits for the FPGA-based reconfigurable systems.
227-246
Electronic Edition (link) BibTeX
- Lech Józwiak, Artur Chojnacki:
Effective and efficient FPGA synthesis through general functional decomposition.
247-265
Electronic Edition (link) BibTeX
- Martyn Edwards, Peter Green:
Run-time support for dynamically reconfigurable computing systems.
267-281
Electronic Edition (link) BibTeX
- Andrzej Krasniewski:
Evaluation of delay fault testability of LUTs for the enhancement of application-dependent testing of FPGAs.
283-296
Electronic Edition (link) BibTeX
Volume 49,
Numbers 7-9,
October 2003
- Rajgopal Kannan, Sibabrata Ray, Radim Bartos:
An optical switching architecture for hierarchical group communication.
297-314
Electronic Edition (link) BibTeX
- Coskun Mermer, Donglok Kim, Stefan G. Berg, Robert J. Gove, Yongmin Kim:
Use of embedded DRAMs in video and image computing.
315-330
Electronic Edition (link) BibTeX
- Wael M. Badawy:
A VLSI architecture for video object motion estimation using a novel 2-D hierarchical mesh.
331-344
Electronic Edition (link) BibTeX
- Mikel Larrea:
On the weakest failure detector for hard agreement problems.
345-353
Electronic Edition (link) BibTeX
- Hun-Chen Chen, Jui-Cheng Yen:
A new cryptography system and its VLSI realization.
355-367
Electronic Edition (link) BibTeX
- James Aweya, Michel Ouellette, Delfin Y. Montuno:
A multi-queue TCP window control scheme with dynamic buffer allocation.
369-385
Electronic Edition (link) BibTeX
- Nadia Nedjah, Luiza de Macedo Mourelle:
Fast reconfigurable systolic hardware for modular multiplication and exponentiation.
387-396
Electronic Edition (link) BibTeX
Volume 49,
Numbers 10-11,
November 2003
Evolutions in parallel distributed and network-based processing
Volume 49,
Numbers 12-15,
December 2003
Synthesis and Verification
- Martyn Edwards, Lech Józwiak:
Preface.
485-487
Electronic Edition (link) BibTeX
- Krzysztof Kuchcinski, Christophe Wolinski:
Global approach to assignment and scheduling of complex behaviors based on HCDG and constraint programming.
489-503
Electronic Edition (link) BibTeX
- María C. Molina, José M. Mendías, Román Hermida:
Allocation of multiple precision behaviors for maximal bit level reuse of hardware resources.
505-519
Electronic Edition (link) BibTeX
- Rolf Drechsler, Wolfgang Günther, Thomas Eschbach, Lothar Linhard, Gerhard Angst:
Recursive bi-partitioning of netlists for large number of partitions.
521-528
Electronic Edition (link) BibTeX
- Enrique San Millán, Luis Entrena, José Alberto Espejo, Celia López:
Theoretical comparison between sequential redundancy addition and removal and retiming optimization techniques.
529-541
Electronic Edition (link) BibTeX
- D. Piso, José-Alejandro Piñeiro, Javier D. Bruguera:
Analysis of the impact of different methods for division/square root computation in the performance of a superscalar microprocessor.
543-555
Electronic Edition (link) BibTeX
- Colin Egan, Gordon Steven, Patrick Quick, Rubén Anguera, Fleur Steven, Lucian N. Vintan:
Two-level branch prediction using neural networks.
557-570
Electronic Edition (link) BibTeX
- Luis Alejandro Cortés, Petru Eles, Zebo Peng:
Modeling and formal verification of embedded systems based on a Petri net representation.
571-598
Electronic Edition (link) BibTeX
- Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vassiliadis, Harry A. G. Wijshoff:
Implementation of a streaming execution unit.
599-617
Electronic Edition (link) BibTeX
- Bart D. Theelen, A. C. Verschueren, V. V. Reyes Suárez, M. P. J. Stevens, A. Nuñez:
A scalable single-chip multi-processor architecture with on-chip RTOS kernel.
619-639
Electronic Edition (link) BibTeX
- Matías J. Garrido, César Sanz, Marcos Jiménez, Juan M. Meneses:
A flexible architecture for H.263 video coding.
641-661
Electronic Edition (link) BibTeX
Copyright © Sun May 17 00:11:03 2009
by Michael Ley (ley@uni-trier.de)
