2008 |
17 | EE | Bart D. Theelen:
Performance Model Generation for MPSoC Design-Space Exploration.
QEST 2008: 39-40 |
16 | EE | Akash Kumar,
Bart Mesman,
Bart D. Theelen,
Henk Corporaal,
Yajun Ha:
Analyzing composability of applications on MPSoC platforms.
Journal of Systems Architecture - Embedded Systems Design 54(3-4): 369-383 (2008) |
15 | EE | Sander Stuijk,
Twan Basten,
Marc Geilen,
Amir Hossein Ghamarian,
Bart D. Theelen:
Resource-efficient routing and scheduling of time-constrained streaming communication on networks-on-chip.
Journal of Systems Architecture - Embedded Systems Design 54(3-4): 411-426 (2008) |
2007 |
14 | EE | Akash Kumar,
Bart Mesman,
Henk Corporaal,
Bart D. Theelen,
Yajun Ha:
A Probabilistic Approach to Model Resource Contention for Performance Estimation of Multi-featured Media Devices.
DAC 2007: 726-731 |
13 | EE | Amir Hossein Ghamarian,
Sander Stuijk,
Twan Basten,
Marc Geilen,
Bart D. Theelen:
Latency Minimization for Synchronous Data Flow Graphs.
DSD 2007: 189-196 |
12 | EE | Bart D. Theelen,
Oana Florescu,
Marc Geilen,
Jinfeng Huang,
P. H. A. van der Putten,
Jeroen Voeten:
Software/Hardware Engineering with the Parallel Object-Oriented Specification Language.
MEMOCODE 2007: 139-148 |
11 | EE | Bart D. Theelen:
A Performance Analysis Tool for Scenario-Aware Streaming Applications.
QEST 2007: 269-270 |
10 | EE | Marc Geilen,
Twan Basten,
Bart D. Theelen,
Ralph Otten:
An Algebra of Pareto Points.
Fundam. Inform. 78(1): 35-74 (2007) |
2006 |
9 | EE | Amir Hossein Ghamarian,
Marc Geilen,
Sander Stuijk,
Twan Basten,
Bart D. Theelen,
Mohammad Reza Mousavi,
A. J. M. Moonen,
Marco Bekooij:
Throughput Analysis of Synchronous Data Flow Graphs.
ACSD 2006: 25-36 |
8 | EE | Sander Stuijk,
Twan Basten,
Marc Geilen,
Amir Hossein Ghamarian,
Bart D. Theelen:
Resource-Efficient Routing and Scheduling of Time-Constrained Network-on-Chip Communication.
DSD 2006: 45-52 |
7 | EE | Akash Kumar,
Bart Mesman,
Bart D. Theelen,
Henk Corporaal,
Yajun Ha:
Resource Manager for Non-preemptive Heterogeneous Multiprocessor System-on-chip.
ESTImedia 2006: 33-38 |
6 | EE | Amir Hossein Ghamarian,
Marc Geilen,
Twan Basten,
Bart D. Theelen,
Mohammad Reza Mousavi,
Sander Stuijk:
Liveness and Boundedness of Synchronous Data Flow Graphs.
FMCAD 2006: 68-75 |
5 | EE | Bart D. Theelen,
Marc Geilen,
Twan Basten,
Jeroen Voeten,
Stefan Valentin Gheorghita,
Sander Stuijk:
A scenario-aware data flow model for combined long-run average and worst-case performance analysis.
MEMOCODE 2006: 185-194 |
2005 |
4 | EE | Marc Geilen,
Twan Basten,
Bart D. Theelen,
Ralph Otten:
An Algebra of Pareto Points.
ACSD 2005: 88-97 |
2003 |
3 | | Bart D. Theelen,
Jeroen Voeten,
R. D. J. Kramer:
Performance modelling of a network processor using POOSL.
Computer Networks 41(5): 667-684 (2003) |
2 | EE | Bart D. Theelen,
A. C. Verschueren,
V. V. Reyes Suárez,
M. P. J. Stevens,
A. Nuñez:
A scalable single-chip multi-processor architecture with on-chip RTOS kernel.
Journal of Systems Architecture 49(12-15): 619-639 (2003) |
2002 |
1 | EE | Bart D. Theelen,
A. C. Verschueren:
Architecture Design of a Scalable Single-Chip Multi-Processor.
DSD 2002: 132-139 |