| 2003 |
|---|
| 7 | EE | Bart D. Theelen,
A. C. Verschueren,
V. V. Reyes Suárez,
M. P. J. Stevens,
A. Nuñez:
A scalable single-chip multi-processor architecture with on-chip RTOS kernel.
Journal of Systems Architecture 49(12-15): 619-639 (2003) |
| 2001 |
|---|
| 6 | | Marc Geilen,
Jeroen Voeten,
P. H. A. van der Putten,
Leo J. van Bokhoven,
M. P. J. Stevens:
Object-oriented modelling and specification using SHE.
Comput. Lang. 27(1/3): 19-38 (2001) |
| 1999 |
|---|
| 5 | EE | P. H. A. van der Putten,
Jeroen Voeten,
Marc Geilen,
M. P. J. Stevens:
System Level Models for Real-Time Communication.
EUROMICRO 1999: 1496- |
| 1998 |
|---|
| 4 | EE | Jeroen Voeten,
P. H. A. van der Putten,
Marc Geilen,
M. P. J. Stevens:
System Level Modelling for Hardware/Software Systems.
EUROMICRO 1998: 10154-10161 |
| 1997 |
|---|
| 3 | EE | Harald P. E. Vranken,
M. P. J. Stevens,
M. T. M. Segers:
Design-For-Debug in Hardware/Software Co-Design.
CODES 1997: 35-42 |
| 1996 |
|---|
| 2 | EE | Jeroen Voeten,
P. H. A. van der Putten,
M. P. J. Stevens:
Behaviour-Preserving Transformations in SHE: A Formal Approach to Architecture Design.
EUROMICRO 1996: 19-27 |
| 1994 |
|---|
| 1 | | Harald P. E. Vranken,
M. P. J. Stevens,
M. T. M. Segers,
J. H. M. M. van Rhee:
System-Level Testability of Hardware/Software Systems.
ITC 1994: 134-142 |
