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José-Alejandro Piñeiro

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2007
13EEPaolo Montuschi, Javier D. Bruguera, Luigi Ciminiera, José-Alejandro Piñeiro: A Digit-by-Digit Algorithm for mth Root Extraction. IEEE Trans. Computers 56(12): 1696-1706 (2007)
2005
12EEJosé-Alejandro Piñeiro, Stuart F. Oberman, Jean-Michel Muller, Javier D. Bruguera: High-Speed Function Approximation Using a Minimax Quadratic Interpolator. IEEE Trans. Computers 54(3): 304-318 (2005)
11EEJosé-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera: High-Radix Logarithm with Selection by Rounding: Algorithm and Implementation. VLSI Signal Processing 40(1): 109-123 (2005)
2004
10EEJosé-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera: Algorithm and Architecture for Logarithm, Exponential, and Powering Computation. IEEE Trans. Computers 53(9): 1085-1096 (2004)
2003
9EEJosé-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera: High-Radix Iterative Algorithm for Powering Computation. IEEE Symposium on Computer Arithmetic 2003: 204-211
8EEJosé-Alejandro Piñeiro, Javier D. Bruguera, Milos D. Ercegovac: On-line high-radix exponential with selection by rounding. ISCAS (4) 2003: 121-124
7EED. Piso, José-Alejandro Piñeiro, Javier D. Bruguera: Analysis of the impact of different methods for division/square root computation in the performance of a superscalar microprocessor. Journal of Systems Architecture 49(12-15): 543-555 (2003)
2002
6EEJosé-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera: High-Radix Logarithm with Selection by Rounding. ASAP 2002: 101-110
5EED. Piso, José-Alejandro Piñeiro, Javier D. Bruguera: Analysis of the Impact of Different Methods for Division/Square Root Computation in the Performance of a Superscalar Microprocessor. DSD 2002: 218-225
4EEJosé-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera: Analysis of the Tradeoffs for the Implementation of a High-Radix Logarithm. ICCD 2002: 132-137
3EEJosé-Alejandro Piñeiro, Javier D. Bruguera: High-Speed Double-Precision Computation of Reciprocal, Division, Square Root and Inverse Square Root. IEEE Trans. Computers 51(12): 1377-1388 (2002)
2001
2EEJosé-Alejandro Piñeiro, Javier D. Bruguera, Jean-Michel Muller: FPGA Implementation of a Faithful Polynomial Approximation for Powering Function Computation. DSD 2001: 262-269
1EEJosé-Alejandro Piñeiro, Javier D. Bruguera, Jean-Michel Muller: Faithful Powering Computation Using Table Look-Up and a Fused Accumulation Tree. IEEE Symposium on Computer Arithmetic 2001: 40-

Coauthor Index

1Javier D. Bruguera [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]
2Luigi Ciminiera [13]
3Milos D. Ercegovac [4] [6] [8] [9] [10] [11]
4Paolo Montuschi [13]
5Jean-Michel Muller [1] [2] [12]
6Stuart F. Oberman [12]
7D. Piso [5] [7]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)