| 2008 |
|---|
| 9 | EE | Lech Józwiak,
Artur Chojnacki,
Aleksander Slusarczyk:
High-Quality Circuit Synthesis for Modern Technologies.
ISQED 2008: 168-173 |
| 2006 |
|---|
| 8 | EE | Lech Józwiak,
Aleksander Slusarczyk,
Dominik Gawlowski:
Multi-objective Optimal FSM State Assignment.
DSD 2006: 385-396 |
| 7 | EE | Lech Józwiak,
Dominik Gawlowski,
Aleksander Slusarczyk:
Multi-objective Optimal Controller Synthesis for Heterogeneous Embedded Systems.
ICSAMOS 2006: 177-184 |
| 2004 |
|---|
| 6 | EE | Lech Józwiak,
Dominik Gawlowski,
Aleksander Slusarczyk:
An Effective Solution of Benchmarking Problem FSM Benchmark Generator and Its Application to Analysis of State Assignment Methods.
DSD 2004: 160-167 |
| 5 | EE | Lech Józwiak,
Aleksander Slusarczyk:
General decomposition of incompletely specified sequential machines with multi-state behavior realization.
Journal of Systems Architecture 50(8): 445-492 (2004) |
| 2003 |
|---|
| 4 | EE | Lech Józwiak,
Aleksander Slusarczyk,
Artur Chojnacki:
Fast and compact sequential circuits for the FPGA-based reconfigurable systems.
Journal of Systems Architecture 49(4-6): 227-246 (2003) |
| 2002 |
|---|
| 3 | EE | Aleksander Slusarczyk,
Lech Józwiak:
Interoperability and Quality of New EDA Tools for Sequential Logic Synthesis.
ISQED 2002: 87- |
| 2001 |
|---|
| 2 | EE | Lech Józwiak,
Artur Chojnacki,
Aleksander Slusarczyk:
Fast and Compact Sequential Circuits through the Information-Driven Circuit Synthesis.
DSD 2001: 46-53 |
| 2000 |
|---|
| 1 | EE | Lech Józwiak,
Aleksander Slusarczyk:
A New State Assignment Method Targeting FPGA Implementations.
EUROMICRO 2000: 1050-1059 |
