2005 |
9 | | Kristof Denolf,
Adrian Chirila-Rus,
Robert D. Turney,
Paul R. Schumacher,
Kees A. Vissers:
Memory Efficient Design of an MPEG-4 Video Encoder for FPGAs.
FPL 2005: 391-396 |
8 | EE | Paul R. Schumacher,
Kristof Denolf,
Adrian Chirila-Rus,
Robert D. Turney,
Nick Fedele,
Kees A. Vissers,
Jan Bormans:
A scalable, multi-stream MPEG-4 video decoder for conferencing and surveillance applications.
ICIP (2) 2005: 886-889 |
7 | EE | Paul R. Schumacher,
Marco Mattavelli,
Adrian Chirila-Rus,
Robert D. Turney:
A Virtual Socket Framework for Rapid Emulation of Video and Multimedia Designs.
ICME 2005: 872-875 |
6 | EE | Adrian Chirila-Rus,
Kristof Denolf,
Bart Vanhoof,
Paul R. Schumacher,
Kees A. Vissers:
Communication Primitives Driven Hardware Design and Test Methodology Applied on Complex Video Applications.
IEEE International Workshop on Rapid System Prototyping 2005: 246-249 |
5 | EE | Paul R. Schumacher,
Marco Mattavelli,
Adrian Chirila-Rus,
Robert D. Turney:
A Software/Hardware Platform for Rapid Prototyping of Video and Multimedia Designs.
IWSOC 2005: 30-33 |
2004 |
4 | EE | Phil James-Roxby,
Paul R. Schumacher,
Charlie Ross:
A Single Program Multiple Data Parallel Processing Platform for FPGAs.
FCCM 2004: 302-303 |
2003 |
3 | EE | Massimo Ravasi,
Marco Mattavelli,
Paul R. Schumacher,
Robert D. Turney:
High-Level Algorithmic Complexity Analysis for the Implementation of a Motion-JPEG2000 Encoder.
PATMOS 2003: 440-450 |
2 | | Paul R. Schumacher:
An efficient optimized JPEG 2000 tier-1 coder hardware implementation.
VCIP 2003: 1089-1096 |
2002 |
1 | EE | Steven M. Currie,
Paul R. Schumacher,
Barry K. Gilbert,
Earl E. Swartzlander Jr.,
Barbara A. Randall:
Implementation of a Single Chip, Pipelined, Complex, One-Dimensional Fast FourierTransform in 0.25 mu m BulkCMOS.
ASAP 2002: 335-343 |