| 2009 |
|---|
| 68 | EE | Dimitri Tan,
Carl Lemonds,
Michael J. Schulte:
Low-Power Multiple-Precision Iterative Floating-Point Multiplier with SIMD Support.
IEEE Trans. Computers 58(2): 175-187 (2009) |
| 67 | EE | Liang-Kai Wang,
Michael J. Schulte,
John D. Thompson,
Nandini Jairam:
Hardware Designs for Decimal Floating-Point Addition and Related Operations.
IEEE Trans. Computers 58(3): 322-335 (2009) |
| 2008 |
|---|
| 66 | EE | Brian J. Hickmann,
Michael J. Schulte,
Mark A. Erle:
Improved combined binary/decimal fixed-point multipliers.
ICCD 2008: 87-94 |
| 2007 |
|---|
| 65 | EE | Charles Tsen,
Michael J. Schulte,
Sonia Gonzalez-Navarro:
Hardware Design of a Binary Integer Decimal-based IEEE P754 Rounding Unit.
ASAP 2007: 115-121 |
| 64 | EE | Suman Mamidi,
Michael J. Schulte,
Daniel Iancu,
C. John Glossner:
Architecture Support for Reconfigurable Multithreaded Processors in Programmable Communication Systems.
ASAP 2007: 320-327 |
| 63 | EE | Liang-Kai Wang,
Charles Tsen,
Michael J. Schulte,
Divya Jhalani:
Benchmarks and performance analysis of decimal floating-point applications.
ICCD 2007: 164-170 |
| 62 | EE | Charles Tsen,
Sonia Gonzalez-Navarro,
Michael J. Schulte:
Hardware design of a Binary Integer Decimal-based floating-point adder.
ICCD 2007: 288-295 |
| 61 | EE | Brian J. Hickmann,
Andrew Krioukov,
Michael J. Schulte,
Mark A. Erle:
A parallel IEEE P754 decimal floating-point multiplier.
ICCD 2007: 296-303 |
| 60 | EE | Michael J. Schulte,
Dimitri Tan,
Carl Lemonds:
Floating-point division algorithms for an x86 microprocessor with a rectangular multiplier.
ICCD 2007: 304-310 |
| 59 | EE | Mark A. Erle,
Michael J. Schulte,
Brian J. Hickmann:
Decimal Floating-Point Multiplication Via Carry-Save Addition.
IEEE Symposium on Computer Arithmetic 2007: 46-55 |
| 58 | EE | Liang-Kai Wang,
Michael J. Schulte:
Decimal Floating-Point Adder and Multifunction Unit with Injection-Based Rounding.
IEEE Symposium on Computer Arithmetic 2007: 56-68 |
| 57 | EE | John Glossner,
Daniel Iancu,
Mayan Moudgill,
Michael J. Schulte,
Stamatis Vassiliadis:
Trends in Low Power Handset Software Defined Radio.
SAMOS 2007: 313-321 |
| 56 | EE | Sean M. Pieper,
JoAnn M. Paul,
Michael J. Schulte:
A New Era of Performance Evaluation.
IEEE Computer 40(9): 23-30 (2007) |
| 55 | EE | Liang-Kai Wang,
Michael J. Schulte:
A Decimal Floating-Point Divider Using Newton-Raphson Iteration.
VLSI Signal Processing 49(1): 3-18 (2007) |
| 2006 |
|---|
| 54 | EE | Mustafa Gök,
Michael J. Schulte,
Mark G. Arnold:
Integer Multipliers with Overflow Detection.
IEEE Trans. Computers 55(8): 1062-1066 (2006) |
| 53 | EE | Ahmet Akkas,
Michael J. Schulte:
Dual-mode floating-point multiplier architectures with parallel operations.
Journal of Systems Architecture 52(10): 549-562 (2006) |
| 52 | EE | Kent E. Wires,
Michael J. Schulte:
Reciprocal and Reciprocal Square Root Units with Operand Modification and Multiplication.
VLSI Signal Processing 42(3): 257-272 (2006) |
| 51 | EE | Michael J. Schulte,
John Glossner,
Sanjay Jinturkar,
Mayan Moudgill,
Suman Mamidi,
Stamatis Vassiliadis:
A Low-Power Multithreaded Processor for Software Defined Radio.
VLSI Signal Processing 43(2-3): 143-159 (2006) |
| 2005 |
|---|
| 50 | EE | Liang-Kai Wang,
Michael J. Schulte:
Decimal Floating-Point Square Root Using Newton-Raphson Iteration.
ASAP 2005: 309-315 |
| 49 | EE | Suman Mamidi,
Daniel Iancu,
Andrei Iancu,
Michael J. Schulte,
John Glossner:
Instruction Set Extensions for Reed-Solomon Encoding and Decoding.
ASAP 2005: 364-369 |
| 48 | EE | Suman Mamidi,
Emily R. Blem,
Michael J. Schulte,
C. John Glossner,
Daniel Iancu,
Andrei Iancu,
Mayan Moudgill,
Sanjay Jinturkar:
Instruction set extensions for software defined radio on a multithreaded processor.
CASES 2005: 266-273 |
| 47 | EE | C. John Glossner,
Mayan Moudgill,
Daniel Iancu,
Gary Nacer,
Sanjay Jinturkar,
Stuart Stanley,
Michael Samori,
Tanuj Raja,
Michael J. Schulte,
Stamatis Vassiliadis:
Future wireless convergence platforms.
CODES+ISSS 2005: 7-12 |
| 46 | EE | Mark A. Erle,
Eric M. Schwarz,
Michael J. Schulte:
Decimal Multiplication with Efficient Partial Product Generation.
IEEE Symposium on Computer Arithmetic 2005: 21-28 |
| 45 | EE | E. George Walters III,
Michael J. Schulte:
Efficient Function Approximation Using Truncated Multipliers and Squarers.
IEEE Symposium on Computer Arithmetic 2005: 232-239 |
| 44 | EE | James E. Stine,
Michael J. Schulte:
A combined two's complement and floating-point comparator.
ISCAS (1) 2005: 89-92 |
| 43 | EE | C. John Glossner,
Sean Dorward,
Sanjay Jinturkar,
Mayan Moudgill,
Erdem Hokenek,
Michael J. Schulte,
Stamatis Vassiliadis:
Sandbridge Software Tools.
SAMOS 2005: 269-278 |
| 42 | EE | Robert D. Kenney,
Michael J. Schulte:
High-Speed Multioperand Decimal Adders.
IEEE Trans. Computers 54(8): 953-963 (2005) |
| 41 | EE | Michael J. Schulte,
Shuvra S. Bhattacharyya,
Robert Schreiber:
Guest Editorial.
VLSI Signal Processing 40(1): 5-6 (2005) |
| 2004 |
|---|
| 40 | EE | Michael J. Schulte,
Kai Chirca,
John Glossner,
Haoran Wang,
Suman Mamidi,
Pablo I. Balzola,
Stamatis Vassiliadis:
A Low-Power Carry Skip Adder with Fast Saturation.
ASAP 2004: 269-279 |
| 39 | EE | Liang-Kai Wang,
Michael J. Schulte:
Decimal Floating-Point Division Using Newton-Raphson Iteration.
ASAP 2004: 84-95 |
| 38 | EE | Kai Chirca,
Michael J. Schulte,
John Glossner,
Haoran Wang,
Suman Mamidi,
Pablo I. Balzola,
Stamatis Vassiliadis:
A Static Low-Power, High-Performance 32-bit Carry Skip Adder.
DSD 2004: 615-619 |
| 37 | EE | Robert D. Kenney,
Michael J. Schulte,
Mark A. Erle:
A High-Frequency Decimal Multiplier.
ICCD 2004: 26-29 |
| 36 | EE | Robert D. Kenney,
Michael J. Schulte:
Multioperand Decimal Addition.
ISVLSI 2004: 251-253 |
| 35 | EE | Shankar Krithivasan,
Michael J. Schulte,
John Glossner:
A Subword-Parallel Multiplication and Sum-of-Squares Unit.
ISVLSI 2004: 273-274 |
| 34 | EE | John D. Thompson,
Nandini Karra,
Michael J. Schulte:
A 64-bit Decimal Floating-Point Adder.
ISVLSI 2004: 297-298 |
| 33 | EE | Michael J. Schulte,
C. John Glossner,
Suman Mamidi,
Mayan Moudgill,
Stamatis Vassiliadis:
A Low-Power Multithreaded Processor for Baseband Communication Systems.
SAMOS 2004: 393-402 |
| 2003 |
|---|
| 32 | EE | Michael J. Schulte,
Louis Marquette,
Shankar Krithivasan,
E. George Walters III,
John Glossner:
Combined Multiplication and Sum-of-Squares Units.
ASAP 2003: 204-214 |
| 31 | EE | Mark A. Erle,
Michael J. Schulte:
Decimal Multiplication Via Carry-Save Addition.
ASAP 2003: 348- |
| 30 | EE | Ahmet Akkas,
Michael J. Schulte:
A Quadruple Precision and Dual Double Precision Floating-Point Multiplier.
DSD 2003: 76-81 |
| 29 | EE | Mark G. Arnold,
Jesus Garcia,
Michael J. Schulte:
The Interval Logarithmic Number System.
IEEE Symposium on Computer Arithmetic 2003: 253-261 |
| 2002 |
|---|
| 28 | EE | C. John Glossner,
Michael J. Schulte,
Stamatis Vassiliadis:
A Java-Enabled DSP.
Embedded Processor Design Challenges 2002: 307-326 |
| 27 | EE | Michael J. Schulte,
Graham A. Jullien:
Guest Editorial.
VLSI Signal Processing 31(2): 75-76 (2002) |
| 2001 |
|---|
| 26 | EE | Kent E. Wires,
Michael J. Schulte,
Don McCarley:
FPGA Resource Reduction Through Truncated Multiplication.
FPL 2001: 574-583 |
| 25 | | Pablo I. Balzola,
Michael J. Schulte,
Jie Ruan,
C. John Glossner,
Erdem Hokenek:
Design Alternatives for Parallel Saturating Multioperand Adders.
ICCD 2001: 172-177 |
| 24 | | Kent E. Wires,
Michael J. Schulte,
James E. Stine:
Combined IEEE Compliant and Truncated Floating Point Multipliers for Reduced Power Dissipation.
ICCD 2001: 497-500 |
| 23 | EE | K'Andrea C. Bickerstaff,
Earl E. Swartzlander Jr.,
Michael J. Schulte:
Analysis of Column Compression Multipliers.
IEEE Symposium on Computer Arithmetic 2001: 33-39 |
| 2000 |
|---|
| 22 | EE | Javier Hormigo,
Julio Villalba,
Michael J. Schulte:
A Hardware Algorithm for Variable-Precision Logarithm.
ASAP 2000: 215-224 |
| 21 | EE | Michael J. Schulte,
Pablo I. Balzola,
Jie Ruan,
C. John Glossner:
Parallel saturating multioperand adders.
CASES 2000: 172-179 |
| 20 | EE | Dean Batten,
Sanjay Jinturkar,
C. John Glossner,
Michael J. Schulte,
Paul D'Arcy:
A New Approach to DSP Intrinsic Functions.
HICSS 2000 |
| 19 | EE | Michael J. Schulte,
Earl E. Swartzlander Jr.:
A Family of Variable-Precision Interval Arithmetic Processors.
IEEE Trans. Computers 49(5): 387-397 (2000) |
| 18 | EE | Michael J. Schulte,
Pablo I. Balzola,
Ahmet Akkas,
Robert W. Brocato:
Integer Multiplication with Overflow Detection or Saturation.
IEEE Trans. Computers 49(7): 681-691 (2000) |
| 1999 |
|---|
| 17 | EE | Navindra Yadav,
Michael J. Schulte,
John Glossner:
Parallel Saturating Fractional Arithmetic Units.
Great Lakes Symposium on VLSI 1999: 214-217 |
| 16 | EE | Michael J. Schulte,
Kent E. Wires:
High-Speed Inverse Square Roots.
IEEE Symposium on Computer Arithmetic 1999: 124- |
| 15 | | Michael J. Schulte,
James E. Stine:
Approximating Elementary Functions with Symmetric Bipartite Tables.
IEEE Trans. Computers 48(8): 842-847 (1999) |
| 14 | EE | Michael J. Schulte,
Vitaly Zelov,
Ahmet Akkas,
James Craig Burley:
The Interval-Enhanced GNU Fortran Compiler.
Reliable Computing 5(3): 311-322 (1999) |
| 13 | EE | James E. Stine,
Michael J. Schulte:
The Symmetric Table Addition Method for Accurate Function Approximation.
VLSI Signal Processing 21(2): 167-177 (1999) |
| 1998 |
|---|
| 12 | EE | James E. Stine,
Michael J. Schulte:
A Combined Interval and Floating Point Multiplier.
Great Lakes Symposium on VLSI 1998: 208- |
| 1997 |
|---|
| 11 | EE | Michael J. Schulte,
James E. Stine:
Accurate Function Approximations by Symmetric Table Lookup and Addition.
ASAP 1997: 144-153 |
| 10 | EE | Michael J. Schulte,
James E. Stine:
Symmetric Bipartite Tables for Accurate Function Approximation.
IEEE Symposium on Computer Arithmetic 1997: 175-183 |
| 1996 |
|---|
| 9 | | Michael J. Schulte:
Hardware interval multipliers.
RITA 3(2): 73-90 (1996) |
| 1995 |
|---|
| 8 | EE | Michael J. Schulte,
Earl E. Swartzlander Jr.:
A Processor for Staggered Interval Arithmetic.
ASAP 1995: 104-112 |
| 7 | EE | Michael J. Schulte,
Earl E. Swartzlander Jr.:
A coprocessor for accurate and reliable numerical computations.
ICCD 1995: 686- |
| 6 | EE | Thomas Lynch,
Ashraf Ahmed,
Michael J. Schulte,
Thomas K. Callaway,
Robert Tisdale:
The K5 transcendental functions.
IEEE Symposium on Computer Arithmetic 1995: 163- |
| 5 | EE | Michael J. Schulte,
Earl E. Swartzlander Jr.:
Hardware Design and Arithmetic Algorithms for a Variable-Precision, Interval Arithmetic Coprocessor.
IEEE Symposium on Computer Arithmetic 1995: 222-229 |
| 4 | EE | Thomas Lynch,
Michael J. Schulte:
A High Radix On-Line Arithmetic for Credible and Accurate Computing.
J. UCS 1(7): 439-453 (1995) |
| 3 | EE | K'Andrea C. Bickerstaff,
Michael J. Schulte,
Earl E. Swartzlander Jr.:
Parallel reduced area multipliers.
VLSI Signal Processing 9(3): 181-191 (1995) |
| 1994 |
|---|
| 2 | | Michael J. Schulte,
Earl E. Swartzlander Jr.:
Hardware Designs for Exactly Rounded Elemantary Functions.
IEEE Trans. Computers 43(8): 964-973 (1994) |
| 1993 |
|---|
| 1 | EE | Michael J. Schulte,
Earl E. Swartzlander Jr.:
Exact rounding of certain elementary functions.
IEEE Symposium on Computer Arithmetic 1993: 138-145 |
