The Journal of VLSI Signal Processing, Volume 21

Volume 21, Number 1, May 1999

• M. Kivioja, Jouni Isoaho, L. Vänskä:
  Design and Implementation of Viterbi Decoder with FPGAs. 5-14
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• Ding-Ming Kwai, Behrooz Parhami:
  Scalability of Programmable FIR Digital Filters. 31-35
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• Hosahalli R. Srinivas, Keshab K. Parhi:
  A Radix 2 Shared Division/Square Root Algorithm and its VLSI Architecture. 37-60
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• Shousheng He, Mats Torkelson:
  An Orthogonal Time-Frequency Extraction Approach to 2D Systolic Architecture for 1D DFT Computation. 61-70
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Volume 21, Number 2, June 1999

• Valerie Taylor:
  Guest Editor's Introduction. 75
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• Peter Rieder, Sven Simon, Christian V. Schimpfle:
  Application Specific Efficient VLSI Architectures for Orthogonal Single- and Multiwavelet Transforms. 77-90
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• Manuel Sánchez, Juan López, Oscar G. Plata, María A. Trenas, Emilio L. Zapata:
  An Efficient Architecture for the In-Place Fast Cosine Transform. 91-102
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• Andy Negoi, Stefan Bara, Jacques Zimmermann, Alain Guyot:
  A Dedicated Circuit for Charged Particles Simulation Using the Monte Carlo Method. 103-116
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• Benjamin W. Wah, Zhe Wu:
  Discrete Lagrangian Methods for Designing Multiplierless Two-Channel PR-LP Filter Banks. 131-149
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• Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee:
  Synthesis of Embedded Software from Synchronous Dataflow Specifications. 151-166
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• James E. Stine, Michael J. Schulte:
  The Symmetric Table Addition Method for Accurate Function Approximation. 167-177
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Volume 21, Number 3, July 1999

• Asim Smailagic, Hugo De Man:
  Guest Editors' Introduction. 183-184
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• Diederik Verkest, Julio Leao da Silva Jr., Chantal Ykman-Couvreur, Kris Croes, Miguel Miranda, Sven Wuytack, Francky Catthoor, Gjalt G. de Jong, Hugo De Man:
  Matisse: A System-on-Chip Design Methodology Emphasizing Dynamic Memory Management. 185-194
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• Jeff Y. F. Hsieh, Teresa H. Y. Meng:
  Low-Power Parallel Video Compression Architecture for a Single-Chip Digital CMOS Camera. 195-207
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• William E. Dougherty, David J. Pursley, Donald E. Thomas:
  Subsetting Behavioral Intellectual Property for Low Power ASIP Design. 209-218
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• Francky Catthoor:
  Energy-Delay Efficient Data Storage and Transfer Architectures and Methodologies: Current Solutions and Remaining Problems. 219-231
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• Tamal Mukherjee, Gary K. Fedder:
  Hierarchical Mixed-Domain Circuit Simulation, Synthesis and Extraction Methodology for MEMS. 233-249
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• Asim Smailagic, Daniel P. Siewiorek:
  System Level Design as Applied to CMU Wearable Computers. 251-263
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• Heebyung Yoon, Junwei Hou, Swapan K. Bhattacharya, Abhijit Chatterjee, Madhavan Swaminathan:
  Fault Detection and Automated Fault Diagnosis for Embedded Integrated Electrical Passives. 265-276
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• Wolfgang Boßung, Sorin Alexander Huss, Stephan Klaus:
  High-Level Embedded System Specifications Based on Process Activation Conditions. 277-291
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