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Jiri Vlach

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2003
16EEKumaraswamy Ponnambalam, Abbas Seifi, Jiri Vlach: Yield optimization with correlated design parameters and non-symmetrical marginal distributions. ISCAS (4) 2003: 736-739
1999
15EEAbbas Seifi, Kumaraswamy Ponnambalam, Jiri Vlach: Probabilistic design of integrated circuits with correlated input parameters. IEEE Trans. on CAD of Integrated Circuits and Systems 18(8): 1214-1219 (1999)
1997
14 C.-J. Richard Shi, Anthony Vannelli, Jiri Vlach: Performance-Driven Layer Assignment by Integer Linear Programming and Path-Constrained Hypergraph Partitioning. J. Heuristics 3(3): 225-243 (1997)
1995
13 Juraj Valsa, Jiri Vlach: SWANN - A Program for Analysis of Switched Analog Nonlinear Networks. ISCAS 1995: 1752-1755
1994
12 Jacek Wojciechowski, Jiri Vlach: Spectra of Graphs with Circulant Blocks and their Applications. ISCAS 1994: 161-164
11 Francisco V. Fernández, Georges G. E. Gielen, Lawrence Huelsman, Agnieszka Konczykowska, Stefano Manetti, Willy M. C. Sansen, Jiri Vlach: Pleasures, Perils and Pitfalls of Symbolic Analysis. ISCAS 1994: 451-457
1993
10 Jiri Vlach, Ajoy Opal, Jacek Wojciechowski: Simulation of Networks with Inconsistent Initial Conditions. ISCAS 1993: 1627-1630
9EEJacek Wojciechowski, Jiri Vlach: Ellipsoidal method for design centering and yield estimation. IEEE Trans. on CAD of Integrated Circuits and Systems 12(10): 1570-1579 (1993)
1991
8 David Bedrosian, Jiri Vlach: An Accelerated Steady-State Method for Networks with Internally Controlled Switches. ICCAD 1991: 24-27
7EEGenhong Ruan, Jiri Vlach, James A. Barby, Ajoy Opal: Analog functional simulator for multilevel systems. IEEE Trans. on CAD of Integrated Circuits and Systems 10(5): 565-576 (1991)
6EEJiri Vlach, James A. Barby, Anthony Vannelli, T. Talkhan, C.-J. Richard Shi: Group delay as an estimate of delay in logic. IEEE Trans. on CAD of Integrated Circuits and Systems 10(7): 949-953 (1991)
1990
5EEGenhong Ruan, Jiri Vlach, James A. Barby: Logic simulation with current-limited switches. IEEE Trans. on CAD of Integrated Circuits and Systems 9(2): 133-141 (1990)
1988
4EEJames A. Barby, Jiri Vlach, Kishore Singhal: Polynomial splines for MOSFET model approximation. IEEE Trans. on CAD of Integrated Circuits and Systems 7(5): 557-566 (1988)
3EEErnst Christen, Jiri Vlach: NETOPT-a program for multiobjective design of linear networks. IEEE Trans. on CAD of Integrated Circuits and Systems 7(5): 567-577 (1988)
2EEGenhong Ruan, Jiri Vlach, James A. Barby: Current-limited switch-level timing simulator for MOS logic networks. IEEE Trans. on CAD of Integrated Circuits and Systems 7(6): 659-667 (1988)
1987
1EERakesh Chadha, Kishore Singhal, Jiri Vlach, Ernst Christen, Milan Vlach: WATOPT -- An Optimizer for Circuit Applications. IEEE Trans. on CAD of Integrated Circuits and Systems 6(3): 472-479 (1987)

Coauthor Index

1James A. Barby [2] [4] [5] [6] [7]
2David Bedrosian [8]
3Rakesh Chadha [1]
4Ernst Christen [1] [3]
5Francisco V. Fernández (Francisco Vidal Fernández Fernández) [11]
6Georges G. E. Gielen [11]
7Lawrence Huelsman [11]
8Agnieszka Konczykowska [11]
9Stefano Manetti [11]
10Ajoy Opal [7] [10]
11Kumaraswamy Ponnambalam [15] [16]
12Genhong Ruan [2] [5] [7]
13Willy M. C. Sansen [11]
14Abbas Seifi [15] [16]
15C.-J. Richard Shi [6] [14]
16Kishore Singhal [1] [4]
17T. Talkhan [6]
18Juraj Valsa [13]
19Anthony Vannelli [6] [14]
20Milan Vlach [1]
21Jacek Wojciechowski [9] [10] [12]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)