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Amir Roth

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2009
25EEAndrew Hilton, Santosh Nagarakatte, Amir Roth: iCFP: Tolerating all-level cache misses in in-order processors. HPCA 2009: 431-442
2007
24EEAndrew D. Hilton, Amir Roth: Ginger: control independence using tag rewriting. ISCA 2007: 436-447
23EETingting Sha, Milo M. K. Martin, Amir Roth: NoSQ: Store-Load Communication without a Store Queue. IEEE Micro 27(1): 106-113 (2007)
2006
22EEAnne Bracy, Amir Roth: Serialization-Aware Mini-Graphs: Performance with Fewer Resources. MICRO 2006: 171-184
21EETingting Sha, Milo M. K. Martin, Amir Roth: NoSQ: Store-Load Communication without a Store Queue. MICRO 2006: 285-296
2005
20EEMarc L. Corliss, E. Christopher Lewis, Amir Roth: Low-Overhead Interactive Debugging via Dynamic Instrumentation with DISE. HPCA 2005: 303-314
19EEVlad Petric, Amir Roth: Energy-Effectiveness of Pre-Execution and Energy-Aware P-Thread Selection. ISCA 2005: 322-333
18EEAmir Roth: Store Vulnerability Window (SVW): Re-Execution Filtering for Enhanced Load Optimization. ISCA 2005: 458-468
17EEVlad Petric, Tingting Sha, Amir Roth: RENO - A Rename-Based Instruction Optimizer. ISCA 2005: 98-109
16EETingting Sha, Milo M. K. Martin, Amir Roth: Scalable Store-Load Forwarding via Store Queue Index Prediction. MICRO 2005: 159-170
15EEMarc L. Corliss, E. Christopher Lewis, Amir Roth: The implementation and evaluation of dynamic code decompression using DISE. ACM Trans. Embedded Comput. Syst. 4(1): 38-72 (2005)
14EEMarc L. Corliss, E. Christopher Lewis, Amir Roth: Using DISE to protect return addresses from attack. SIGARCH Computer Architecture News 33(1): 65-72 (2005)
2004
13EEAnne Bracy, Prashant Prahlad, Amir Roth: Dataflow Mini-Graphs: Amplifying Superscalar Capacity and Bandwidth. MICRO 2004: 18-29
2003
12EEMarc L. Corliss, E. Christopher Lewis, Amir Roth: DISE: A Programmable Macro Engine for Customizing Applications. ISCA 2003: 362-373
11EEMarc L. Corliss, E. Christopher Lewis, Amir Roth: A DISE implementation of dynamic code decompression. LCTES 2003: 232-243
2002
10EEVlad Petric, Anne Bracy, Amir Roth: Three extensions to register integration. MICRO 2002: 37-47
9EEAmir Roth, Gurindar S. Sohi: A quantitative framework for automated pre-execution thread selection. MICRO 2002: 430-441
2001
8EEAmir Roth, Gurindar S. Sohi: Speculative Data-Driven Multithreading. HPCA 2001: 37-
7EEGurindar S. Sohi, Amir Roth: Speculative Multithreaded Processors. IEEE Computer 34(4): 66-71 (2001)
6EEAmir Roth, Gurindar S. Sohi: Squash Reuse via a Simplified Implementation of Register Integration. J. Instruction-Level Parallelism 3: (2001)
2000
5EEAmir Roth, Gurindar S. Sohi: Register integration: a simple and efficient implementation of squash reuse. MICRO 2000: 223-234
1999
4EEAmir Roth, Gurindar S. Sohi: Effective Jump-Pointer Prefetching for Linked Data Structures. ISCA 1999: 111-121
3EEAmir Roth, Andreas Moshovos, Gurindar S. Sohi: Improving virtual function call target prediction via dependence-based pre-computation. International Conference on Supercomputing 1999: 356-364
1998
2EEAmir Roth, Andreas Moshovos, Gurindar S. Sohi: Dependance Based Prefetching for Linked Data Structures. ASPLOS 1998: 115-126
1997
1EEMilo M. K. Martin, Amir Roth, Charles N. Fischer: Exploiting Dead Value Information. MICRO 1997: 125-135

Coauthor Index

1Anne Bracy [10] [13] [22]
2Marc L. Corliss [11] [12] [14] [15] [20]
3Charles N. Fischer [1]
4Andrew Hilton [25]
5Andrew D. Hilton [24]
6E. Christopher Lewis [11] [12] [14] [15] [20]
7Milo M. K. Martin [1] [16] [21] [23]
8Andreas Moshovos [2] [3]
9Santosh Nagarakatte [25]
10Vlad Petric [10] [17] [19]
11Prashant Prahlad [13]
12Tingting Sha [16] [17] [21] [23]
13Gurindar S. Sohi [2] [3] [4] [5] [6] [7] [8] [9]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)