2006 |
22 | EE | Anne E. Gattiker:
IC failure mechanisms yesterday, today, tomorrow: implications from test to DFM.
ISPD 2006: 47 |
21 | EE | Kerry Bernstein,
David J. Frank,
Anne E. Gattiker,
Wilfried Haensch,
Brian L. Ji,
Sani R. Nassif,
Edward J. Nowak,
Dale J. Pearson,
Norman J. Rohrer:
High-performance CMOS variability in the 65-nm regime and beyond.
IBM Journal of Research and Development 50(4-5): 433-450 (2006) |
20 | EE | Anne E. Gattiker:
Getting More out of ITC.
IEEE Design & Test of Computers 23(5): 432 (2006) |
2004 |
19 | EE | Anne E. Gattiker:
Diagnosis Meets Physical Failure Analysis: How Long can we Succeed?
ITC 2004: 1441 |
18 | EE | Phil Nigh,
Anne E. Gattiker:
Random and Systematic Defect Analysis Using IDDQ Signature Analysis for Understanding Fails and Guiding Test Decisions.
ITC 2004: 309-318 |
2003 |
17 | EE | Wojciech Maly,
Anne E. Gattiker,
Thomas Zanon,
Thomas J. Vogels,
R. D. (Shawn) Blanton,
Thomas M. Storey:
Deformations of IC Structure in Test and Yield Learning.
ITC 2003: 856-865 |
16 | EE | James F. Plusquellic,
Abhishek Singh,
Chintan Patel,
Anne E. Gattiker:
Power supply transient signal analysis for defect-oriented test.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(3): 370-374 (2003) |
2002 |
15 | EE | Anne E. Gattiker,
Sani R. Nassif,
Rashmi Dinakar,
Chris Long:
Static timing analysis based circuit-limited-yield estimation.
ISCAS (5) 2002: 81-84 |
14 | EE | Duane S. Boning,
Joseph Panganiban,
Karen Gonzalez-Valentin,
Sani R. Nassif,
Chandler McDowell,
Anne E. Gattiker,
Frank Liu:
Test structures for delay variability.
Timing Issues in the Specification and Synthesis of Digital Systems 2002: 109 |
13 | EE | Abhishek Singh,
Jim Plusquellic,
Anne E. Gattiker:
Power Supply Transient Signal Analysis Under Real Process and Test Hardware Models.
VTS 2002: 357-366 |
12 | EE | Pranab K. Nag,
Anne E. Gattiker,
Sichao Wei,
Ronald D. Blanton,
Wojciech Maly:
Modeling the Economics of Testing: A DFT Perspective.
IEEE Design & Test of Computers 19(1): 29-41 (2002) |
2001 |
11 | EE | Anne E. Gattiker,
Sani R. Nassif,
Rashmi Dinakar,
Chris Long:
Timing Yield Estimation from Static Timing Analysis.
ISQED 2001: 437-442 |
10 | | Abhishek Singh,
Chintan Patel,
Shirong Liao,
James F. Plusquellic,
Anne E. Gattiker:
Detecting delay faults using power supply transient signal analysis.
ITC 2001: 395-404 |
2000 |
9 | | Phil Nigh,
Anne E. Gattiker:
Test method evaluation experiments and data.
ITC 2000: 454-463 |
1998 |
8 | EE | Anne E. Gattiker,
Wojciech Maly:
Toward understanding "Iddq-only" fails.
ITC 1998: 174-183 |
1997 |
7 | EE | Anne E. Gattiker,
Wojciech Maly:
Current signatures: application [to CMOS].
ITC 1997: 1168-1177 |
6 | | Anne E. Gattiker,
Wojciech Maly:
Current Signatures: Application.
ITC 1997: 156-165 |
5 | | Sichao Wei,
Pranab K. Nag,
Ronald D. Blanton,
Anne E. Gattiker,
Wojciech Maly:
To DFT or Not to DFT?
ITC 1997: 557-566 |
4 | EE | Anne E. Gattiker,
Wojciech Maly:
Smart Substrate MCMs.
J. Electronic Testing 10(1-2): 39-53 (1997) |
1996 |
3 | EE | Anne E. Gattiker,
Wojciech Maly:
Current signatures [VLSI circuit testing].
VTS 1996: 112-117 |
1994 |
2 | | Anne E. Gattiker,
Wojciech Maly:
Feasibility Study of Smart Substrate Multichip Modules.
ITC 1994: 41-49 |
1 | EE | Wojciech Maly,
Derek Feltham,
Anne E. Gattiker,
Mark D. Hobaugh,
Kenneth Backus,
Michael E. Thomas:
Smart-Substrate Multichip-Module Systems.
IEEE Design & Test of Computers 11(2): 64-73 (1994) |