Kolin Paul

2008
18	EE	Nagaraju Pothineni, Anshul Kumar, Kolin Paul: Exhaustive Enumeration of Legal Custom Instructions for Extensible Processors. VLSI Design 2008: 261-266
17	EE	Nagaraju Pothineni, Anshul Kumar, Kolin Paul: A Novel Approach to Compute Spatial Reuse in the Design of Custom Instructions. VLSI Design 2008: 348-353
2007
16		Nagaraju Pothineni, Anshul Kumar, Kolin Paul: Recurring Pattern Identification and its Application to Instruction Set Extension. CDES 2007: 67-73
15	EE	Kolin Paul, Joel Porquet, Josep Llosa: Silicon Compaction/Defragmentation for Partial Runtime Reconfiguration. DSD 2007: 317-324
14	EE	Nagaraju Pothineni, Anshul Kumar, Kolin Paul: Application Specific Datapath Extension with Distributed I/O Functional Units. VLSI Design 2007: 551-558
2006
13	EE	Nilesh Padhariya, Kolin Paul, Dheeraj Bhardwaj: A FLOPs Based Model for Performance Analysis and Scheduling of Applications for Single and Multiple CPUs. ICPP Workshops 2006: 455-464
12	EE	Rahul Jain, Anindita Mukherjee, Kolin Paul: Defect-Aware Design Paradigm for Reconfigurable Architectures. ISVLSI 2006: 91-96
2005
11		Sanjay V. Rajopadhye, Kolin Paul: A 1.5-D Architecture for Back-Propagation Training. ERSA 2005: 112-118
10	EE	Kolin Paul: An FPGA Based Test Bed for Bio Inspired Computation. IPDPS 2005
2002
9	EE	Kolin Paul, Dipanwita Roy Chowdhury, Parimal Pal Chaudhuri: Theory of Extended Linear Machines. IEEE Trans. Computers 51(9): 1106-1110 (2002)
2000
8	EE	Kolin Paul, Ranadeep Ghosal, Biplab K. Sikdar, Santashil Pal Chaudhuri, Dipanwita Roy Chowdhury: GF(2p) CA Based Vector Quantization for Fast Encoding of Still Images. VLSI Design 2000: 140-143
7	EE	Kolin Paul, Parimal Pal Chaudhuri, Dipanwita Roy Chowdhury: Scalable Pipelined Micro-Architecture for Wavelet Transform. VLSI Design 2000: 144-
6		Parimal Pal Chaudhuri, Dipanwita Roy Chowdhury, Kolin Paul, Biplab K. Sikdar: Theory and Applications of Cellular Automata for VLSI Design and Testing. VLSI Design 2000: 4
5	EE	Biplab K. Sikdar, Kolin Paul, Gosta Pada Biswas, Parimal Pal Chaudhuri, Vamsi Boppana, Cliff Yang, Sobhan Mukherjee: Theory and Application of GF(2p) Cellular Automata as On-chip Test Pattern Generator. VLSI Design 2000: 556-561
4	EE	Kolin Paul, Dipanwita Roy Chowdhury: Application of GF(2p) CA in Burst Error Correcting Codes. VLSI Design 2000: 562-567
1999
3		Kolin Paul, Dipanwita Roy Chowdhury, Parimal Pal Chaudhuri: Cellular Automata Based Transform Coding for Image Compression. HiPC 1999: 269-273
2		Kolin Paul, P. Dutta, Dipanwita Roy Chowdhury, Prasanta Kumar Nandi, Parimal Pal Chaudhuri: A VLSI Architecture for On-Line Image Decompression Using GF(28) Cellular Automata. VLSI Design 1999: 532-537
1998
1	EE	Kolin Paul, A. Roy, Prasanta Kumar Nandi, B. N. Roy, M. Deb Purkayastha, Santanu Chattopadhyay, Parimal Pal Chaudhuri: Theory and Application of Multiple Attractor Cellular Automata for Fault Diagnosis. Asian Test Symposium 1998: 388-

Coauthor Index

1	Dheeraj Bhardwaj	[13]
2	Gosta Pada Biswas	[5]
3	Vamsi Boppana	[5]
4	Santanu Chattopadhyay	[1]
5	Parimal Pal Chaudhuri	[1] [2] [3] [5] [6] [7] [9]
6	Santashil Pal Chaudhuri	[8]
7	Dipanwita Roy Chowdhury	[2] [3] [4] [6] [7] [8] [9]
8	P. Dutta	[2]
9	Ranadeep Ghosal	[8]
10	Rahul Jain	[12]
11	Anshul Kumar	[14] [16] [17] [18]
12	Josep Llosa	[15]
13	Anindita Mukherjee	[12]
14	Sobhan Mukherjee	[5]
15	Prasanta Kumar Nandi	[1] [2]
16	Nilesh Padhariya	[13]
17	Joel Porquet	[15]
18	Nagaraju Pothineni	[14] [16] [17] [18]
19	M. Deb Purkayastha	[1]
20	Sanjay V. Rajopadhye	[11]
21	A. Roy	[1]
22	B. N. Roy	[1]
23	Biplab K. Sikdar	[5] [6] [8]
24	Cliff Yang	[5]

Colors in the list of coauthors