| |
| 2007 | ||
|---|---|---|
| 2 | EE | Rohit Pandey, Michael L. Bushnell: Architecture for Variable-Length Combined FFT, DCT, and MWT Transform Hardware for a Multi-ModeWireless System. VLSI Design 2007: 121-126 |
| 2003 | ||
| 1 | EE | Rohit Pandey, Santanu Chattopadhyay: Low Power Technology Mapping for LUT based FPGA "A Genetic Algorithm Approach". VLSI Design 2003: 79-84 |
| 1 | Michael L. Bushnell | [2] |
| 2 | Santanu Chattopadhyay | [1] |